SLVSB63A December 2011 – March 2016 TPS62231-Q1 , TPS622314-Q1
PRODUCTION DATA.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The TPS6223x-Q1 family of devices is a high-frequency, synchronous, step-down DC-DC converter providing switch frequencies up to 3.8 MHz.
The device operates over an input voltage range of 2.05 V to 6 V. The TPS62231-Q1 device has a fixed output voltage of 1.8 V (typical) and the TPS622314-Q1 device has a fixed output voltage of 1.5 V (typical). The device is easy to use and requires just three external components; however, the selection of external components and PCB layout must comply with the design guidelines to achieve the specified performance.
The device is optimized to operate with effective inductance values in the range of 0.7 μH to 4.3 μH and with effective output capacitance in the range of 2 μF to 15 μF. The internal compensation is optimized to operate with an output filter of L = 1 μH or 2.2 μH and COUT = 4.7 μF. Larger or smaller inductor and capacitor values can be used to optimize the performance of the device for specific operation conditions. For more details, see the Checking Loop Stability section.
The inductor value affects the peak-to-peak ripple current, the PWM-to-PFM transition point, the output voltage ripple, and the efficiency. The selected inductor must be rated for DC resistance and saturation current. The inductor ripple current (ΔIL) decreases with higher inductance and increases with higher VIN or VOUT. Use Equation 5 to calculate the maximum inductor current under static load conditions. The saturation current of the inductor must be rated higher than the maximum inductor current as calculated with Equation 6. This rating is recommended because during heavy load transient the inductor current will rise above the calculated value.
where
where
In high-frequency converter applications, the efficiency is essentially affected by the inductor AC resistance (essentially the quality factor) and to a smaller extent by the inductor DCR value. To achieve high efficiency operation, use care when selecting inductors featuring a quality factor above 25 at the switching frequency. Increasing the inductor value produces lower RMS currents, but degrades transient response. For a given physical inductor size, increased inductance usually results in an inductor with lower saturation current.
The total losses of the coil consist of both the losses in the DC resistance, R(DC), and the following frequency-dependent components:
Table 1 lists the inductor series from different suppliers that have been used with the TPS6223x-Q1 converters. These components must be verified and validated to determine whether the component is suitable for the end application.
INDUCTANCE (μH) |
DIMENSIONS (mm3) |
INDUCTOR TYPE | SUPPLIER |
---|---|---|---|
1 | 2.5 × 2 × 1.2 | LQM2HPN1R0MJ0 | Murata |
2.2 | 2 × 1.2 × 0.55 | LQM21PN2R2 | Murata |
1 or 2.2 | 2 × 1.2 × 1 | KSLI2012 series | Hitachi Metal |
The unique hysteretic PWM control scheme of the TPS6223x-Q1 device allows the use of tiny ceramic capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance over temperature, become resistive at high frequencies.
At light load currents the converter operate in power save mode and the output voltage ripple is dependent on the output capacitor value and the PFM peak inductor current. Higher output capacitor values minimize the voltage ripple in PFM Mode and tighten DC output accuracy in PFM Mode.
Because of the nature of the buck converter having a pulsating input current, a low-ESR input capacitor is required for best input voltage filtering and minimizing the interference with other circuits caused by high input voltage spikes. For most applications a 2.2-μF to 4.7-μF ceramic capacitor is recommended. The input capacitor can be increased without any limit for better input voltage filtering. Because a ceramic capacitor loses up to 80% of the initial capacitance at 5 V, TI recommends using 4.7-μF input capacitors for input voltages greater than 4.5 V.
Take care when using only small ceramic input capacitors. When a ceramic capacitor is used at the input and the power is being supplied through long wires, such as from a wall adapter, a load step at the output or VIN step on the input can induce ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop instability or could even damage the part by exceeding the maximum ratings.
Table 2 lists some tested input and output capacitors. These components must be verified and validated to determine whether the component is suitable for the end application.
CAPACITANCE (μF) | SIZE | CAPACITOR TYPE | SUPPLIER |
---|---|---|---|
2.2 | 0402 | GRM155R60J225 | Murata |
4.7 | 0402 | AMK105BJ475MV | Taiyo Yuden |
4.7 | 0402 | GRM155R60J475 | Murata |
4.7 | 0402 | CL05A475MQ5NRNC | Samsung |
4.7 | 0603 | GRM188R60J475 | Murata |
The first step of circuit and stability evaluation is to look at the following signals from a steady-state perspective:
These signals are the basic signals that must be measured when evaluating a switching converter. When the switching waveform shows large duty-cycle jitter or the output voltage or inductor current shows oscillations, the regulation loop may be unstable. This is often a result of board layout, L-C combination, or both.
As a next step in the evaluation of the regulation loop, the load transient response is tested. The time between the application of the load transient and the turnon of the P-channel MOSFET, the output capacitor must supply all of the current required by the load. VOUT immediately shifts by an amount equal to ΔI(LOAD) × ESR, where ESR is the effective series resistance of COUT. ΔI(LOAD) begins to charge or discharge CO generating a feedback error signal used by the regulator to return VOUT to the steady-state value. The results are most easily interpreted when the device operates in PWM mode.
During this recovery time, VOUT can be monitored for settling time, overshoot, or ringing that helps judge the stability of the converter. Without any ringing, the loop has usually more than 45° of phase margin.
Because the damping factor of the circuitry is directly related to several resistive parameters (for example, MOSFET rDS(on)) that are temperature dependant, the loop stability analysis must occur over the input voltage range, load current range, and temperature range.