SLVSA67F February 2010 – April 2020 TPS62400-Q1 , TPS62402-Q1 , TPS62404-Q1 , TPS62405-Q1
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
Use of the MODE/DATA pin for two functions, interface and mode selection, necessitates a determination of when to decode the bit stream or to change the operation mode.
The device enters forced PWM mode operation immediately whenever the MODE/DATA pin turns to high level. The device also stays in forced PWM mode during the entire protocol reception time.
With a falling edge on the MODE/DATA pin, the device starts bit decoding. If the MODE/DATA pin stays low for at least ttimeout, the device gets an internal time-out and enables power-save-mode operation.
The device ignores a protocol sent within this time because the first interpretation of a falling edge for the mode change is at the start of the first bit. In this case, TI recommends sending the protocol first, and then changing to power-save mode at the end of the protocol.
BYTE | BIT NUMBER | NAME | TRANSMISSION DIRECTION | DESCRIPTION |
---|---|---|---|---|
Device address byte | 7 | DA7 | IN | 0 MSB device address |
6 | DA6 | IN | 1 | |
5 | DA5 | IN | 0 | |
4 | DA4 | IN | 0 | |
4E hex | 3 | DA3 | IN | 1 |
2 | DA2 | IN | 1 | |
1 | DA1 | IN | 1 | |
0 | DA0 | IN | 0 LSB device address | |
Data byte | 7 (MSB) | RFA | IN | Request for acknowledge; if high, the device applies an acknowledge condition. |
6 | A1 | Address bit 1 | ||
5 | A0 | Address bit 0 | ||
4 | D4 | Data bit 4 | ||
3 | D3 | Data bit 3 | ||
2 | D2 | Data bit 2 | ||
1 | D1 | Data bit 1 | ||
0 (LSB) | D0 | Data bit 0 | ||
ACK | OUT | Acknowledge condition active 0, the device applies this condition only in the case of a set RFA bit. Open-drain output, the host must pull the line high with a pullup resistor. | ||
One can only use this feature if the master has an open-drain output stage. In case of a push-pull output stage, do not request an acknowledge condition. |
TPS62400-Q1 OUTPUT VOLTAGE [V]
REGISTER REG_DEF_1_LOW |
D4 | D3 | D2 | D1 | D0 | |
---|---|---|---|---|---|---|
0 | VOUT1 Adjustable with Resistor Network on DEF_1 Pin (default TPS62400-Q1) | 0 | 0 | 0 | 0 | 0 |
0.6 V with DEF_1 connected to VOUT1 (default TPS62400-Q1) | ||||||
1 | 0.825 | 0 | 0 | 0 | 0 | 1 |
2 | 0.85 | 0 | 0 | 0 | 1 | 0 |
3 | 0.875 | 0 | 0 | 0 | 1 | 1 |
4 | 0.9 | 0 | 0 | 1 | 0 | 0 |
5 | 0.925 | 0 | 0 | 1 | 0 | 1 |
6 | 0.95 | 0 | 0 | 1 | 1 | 0 |
7 | 0.975 | 0 | 0 | 1 | 1 | 1 |
8 | 1 | 0 | 1 | 0 | 0 | 0 |
9 | 1.025 | 0 | 1 | 0 | 0 | 1 |
10 | 1.05 | 0 | 1 | 0 | 1 | 0 |
11 | 1.075 | 0 | 1 | 0 | 1 | 1 |
12 | 1.1 | 0 | 1 | 1 | 0 | 0 |
13 | 1.125 | 0 | 1 | 1 | 0 | 1 |
14 | 1.15 | 0 | 1 | 1 | 1 | 0 |
15 | 1.175 | 0 | 1 | 1 | 1 | 1 |
16 | 1.2 | 1 | 0 | 0 | 0 | 0 |
17 | 1.225 | 1 | 0 | 0 | 0 | 1 |
18 | 1.25 | 1 | 0 | 0 | 1 | 0 |
19 | 1.275 | 1 | 0 | 0 | 1 | 1 |
20 | 1.3 | 1 | 0 | 1 | 0 | 0 |
21 | 1.325 | 1 | 0 | 1 | 0 | 1 |
22 | 1.35 | 1 | 0 | 1 | 1 | 0 |
23 | 1.375 | 1 | 0 | 1 | 1 | 1 |
24 | 1.4 | 1 | 1 | 0 | 0 | 0 |
25 | 1.425 | 1 | 1 | 0 | 0 | 1 |
26 | 1.45 | 1 | 1 | 0 | 1 | 0 |
27 | 1.475 | 1 | 1 | 0 | 1 | 1 |
28 | 1.5 | 1 | 1 | 1 | 0 | 0 |
29 | 1.525 | 1 | 1 | 1 | 0 | 1 |
30 | 1.55 | 1 | 1 | 1 | 1 | 0 |
31 | 1.575 | 1 | 1 | 1 | 1 | 1 |