SLVSA67F February 2010 – April 2020 TPS62400-Q1 , TPS62402-Q1 , TPS62404-Q1 , TPS62405-Q1
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
The EasyScale interface is a simple but very flexible one-pin interface to configure the output voltage of both DC-DC converters. A master-slave structure is the basis of the interface, where the master is typically a microcontroller or application processor. Figure 9 and Table 3 give an overview of the protocol. The protocol consists of a device-specific address byte and a data byte. The device-specific address byte is fixed to 4E hex. The data byte consists of five bits for information, two address bits, and the RFA bit. The RFA bit set to high indicates the request-for-acknowledge condition. The acknowledge condition only applies after correct reception of the protocol.
The advantage of the EasyScale interface compared to other one-pin interfaces is that its bit detection is to a large extent independent from the bit transmission rate. It can automatically detect bit rates between 1.7 kb/s and up to 160 kb/s. Furthermore, the interface shares the MODE/DATA pin and requires no additional pin.