SLVS871D February 2010 – June 2016 TPS62660 , TPS62665
PRODUCTION DATA.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The TPS62660 is a high-efficient synchronous step-down converter providing up to 1000-mA output current.
The device operates over an input voltage range from 2.3 V to 5.5 V.
The TPS62660 series of step-down converters have been optimized to operate with an effective inductance value in the range of 0.3 μH to 1.3 μH and with output capacitors in the range of 4.7 μF to 10 μF. The internal compensation is optimized to operate with an output filter of L = 0.47 μH and CO = 4.7 μF. Larger or smaller inductor values can be used to optimize the performance of the device for specific operation conditions. For more details, see Checking Loop Stability.
The inductor value affects its peak-to-peak ripple current, the PWM-to-PFM transition point, the output voltage ripple, and the efficiency. The selected inductor must be rated for its DC resistance and saturation current. The inductor ripple current (ΔIL) decreases with higher inductance and increases with higher VI or VO.
where
In high-frequency converter applications, the efficiency is essentially affected by the inductor AC resistance (that is, quality factor) and to a smaller extent by the inductor DCR value. To achieve high-efficiency operation, take care in selecting inductors featuring a quality factor above 25 at the switching frequency. Increasing the inductor value produces lower RMS currents, but degrades transient response. For a given physical inductor size, increased inductance usually results in an inductor with lower saturation current.
The total losses of the coil consist of both the losses in the DC resistance (R(DC)) and the following frequency-dependent components:
The following inductor series from different suppliers have been used with the TPS62660 converters.
MANUFACTURER | SERIES | DIMENSIONS |
---|---|---|
MURATA | LQM21PN1R0NGR | 2.0 × 1.2 × 1.0 max. height |
LQM21PNR54MGC | 2.0 × 1.2 × 1.0 max. height | |
LQM2MPN1R0NG0 | 2.0 × 1.6 × 1.0 max. height | |
PANASONIC | ELGTEAR82NA | 2.0 × 1.2 × 1.0 max. height |
TOKO | MDT2012-CX1R0A | 2.0 × 1.2 × 1.0 max. height |
TAIYO YUDEN | NM2012NR82, NM2012N1R0 | 2.0 × 1.2 × 1.0 max. height |
FDK | MIPS2012D1R0-X2 | 2.0 × 1.2 × 1.0 max. height |
The advanced fast-response voltage mode control scheme of the TPS6266x allows the use of tiny ceramic capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are recommended. For best performance, the device must operate within a minimum effective output capacitance of 1.6 μF. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their wide variation in capacitance over temperature, become resistive at high frequencies.
At nominal load current, the device operates in PWM mode and the overall output voltage ripple is the sum of the voltage step caused by the output capacitor ESL and the ripple current flowing through the output capacitor impedance.
At light loads, the output capacitor limits the output ripple voltage and provides holdup during large load transitions. A 4.7-μF capacitor typically provides sufficient bulk capacitance to stabilize the output during large load transitions. The typical output voltage ripple is 1% of the nominal output voltage VO.
The output voltage ripple during PFM mode operation can be kept very small. The PFM pulse is time controlled, which allows to modify the charge transferred to the output capacitor by the value of the inductor. The resulting PFM output voltage ripple and PFM frequency depend in first order on the size of the output capacitor and the inductor value. The PFM frequency decreases with smaller inductor values and increases with larger once. Increasing the output capacitor value and the effective inductance minimizes the output ripple voltage.
Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is required to prevent large voltage transients that can cause misbehavior of the device or interferences with other circuits in the system. For most applications, a 4.7-μF capacitor is sufficient. If the application exhibits a noisy or erratic switching frequency, the remedy is probably found by experimenting with the value of the input capacitor.
Take care when using only ceramic input capacitors. When a ceramic capacitor is used at the input and the power is being supplied through long wires, such as from a wall adapter, a load step at the output can induce ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop instability or could even damage the part. Additional bulk capacitance (electrolytic or tantalum) must in this circumstance be placed between CI and the power source lead to reduce ringing than can occur between the inductance of the power source leads and CI.
The first step of circuit and stability evaluation is to look from a steady-state perspective at the following signals:
These are the basic signals that need to be measured when evaluating a switching converter. When the switching waveform shows large duty cycle jitter or the output voltage or inductor current shows oscillations, the regulation loop may be unstable. This is often a result of board layout or L-C combination.
As a next step in the evaluation of the regulation loop, the load transient response is tested. The time between the application of the load transient and the turnon of the P-channel MOSFET, the output capacitor must supply all of the current required by the load. VO immediately shifts by an amount equal to ΔI(LOAD) × ESR, where ESR is the effective series resistance of CO. ΔI(LOAD) begins to charge or discharge CO generating a feedback error signal used by the regulator to return VO to its steady-state value. The results are most easily interpreted when the device operates in PWM mode.
During this recovery time, VO can be monitored for settling time, overshoot or ringing that helps judge the converter’s stability. Without any ringing, the loop has usually more than 45° of phase margin.
Because the damping factor of the circuitry is directly related to several resistive parameters (for example, MOSFET rDS(on)) that are temperature dependant, the loop stability analysis has to be done over the input voltage range, load current range, and temperature range.