JAJSLY4B January   2023  – May 2024 TPS62870 , TPS62871 , TPS62872 , TPS62873

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. 概要 (続き)
  6. Device Options
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings_Catalog
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 I2C Interface Timing Characteristics
    7. 7.7 Timing Requirements
    8. 7.8 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed-Frequency DCS Control Topology
      2. 8.3.2  Forced PWM and Power Save Modes
      3. 8.3.3  Precise Enable
      4. 8.3.4  Start-Up
      5. 8.3.5  Switching Frequency Selection
      6. 8.3.6  Output Voltage Setting
        1. 8.3.6.1 Output Voltage Range
        2. 8.3.6.2 Output Voltage Setpoint
        3. 8.3.6.3 Non-Default Output Voltage Setpoint
        4. 8.3.6.4 Dynamic Voltage Scaling
      7. 8.3.7  Compensation (COMP)
      8. 8.3.8  Mode Selection and Clock Synchronization (MODE/SYNC)
      9. 8.3.9  Spread Spectrum Clocking (SSC)
      10. 8.3.10 Output Discharge
      11. 8.3.11 Undervoltage Lockout (UVLO)
      12. 8.3.12 Overvoltage Lockout (OVLO)
      13. 8.3.13 Overcurrent Protection
        1. 8.3.13.1 Cycle-by-Cycle Current Limiting
        2. 8.3.13.2 Hiccup Mode
        3. 8.3.13.3 Current Limit Mode
      14. 8.3.14 Power Good (PG)
        1. 8.3.14.1 Standalone or Primary Device Behavior
        2. 8.3.14.2 Secondary Device Behavior
      15. 8.3.15 Remote Sense
      16. 8.3.16 Thermal Warning and Shutdown
      17. 8.3.17 Stacked Operation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset
      2. 8.4.2 Undervoltage Lockout
      3. 8.4.3 Standby
      4. 8.4.4 On
    5. 8.5 Programming
      1. 8.5.1 Serial Interface Description
      2. 8.5.2 Standard, Fast, Fast Mode Plus Protocol
      3. 8.5.3 I2C Update Sequence
      4. 8.5.4 I2C Register Reset
  10. Register Map
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Selecting the Inductor
        2. 10.2.2.2 Selecting the Input Capacitors
        3. 10.2.2.3 Selecting the Compensation Resistor
        4. 10.2.2.4 Selecting the Output Capacitors
        5. 10.2.2.5 Selecting the Compensation Capacitor, CC
        6. 10.2.2.6 Selecting the Compensation Capacitor, CC2
      3. 10.2.3 Application Curves
    3. 10.3 Best Design Practices
    4. 10.4 Power Supply Recommendations
    5. 10.5 Layout
      1. 10.5.1 Layout Guidelines
      2. 10.5.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 サード・パーティ製品に関する免責事項
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Application Curves

TPS62870 TPS62871 TPS62872 TPS62873 Efficiency
VOUT = 0.4V
Figure 10-2 Efficiency
TPS62870 TPS62871 TPS62872 TPS62873 Efficiency
VOUT = 0.5V
Figure 10-4 Efficiency
TPS62870 TPS62871 TPS62872 TPS62873 Efficiency
VOUT = 0.75V
Figure 10-6 Efficiency
TPS62870 TPS62871 TPS62872 TPS62873 Efficiency
VOUT = 0.875V
Figure 10-8 Efficiency
TPS62870 TPS62871 TPS62872 TPS62873 Efficiency
VOUT = 1.05V
Figure 10-10 Efficiency
TPS62870 TPS62871 TPS62872 TPS62873 Line Regulation
IOUT = 10A
Figure 10-12 Line Regulation
TPS62870 TPS62871 TPS62872 TPS62873 Line Transient ResponseFigure 10-14 Line Transient Response
TPS62870 TPS62871 TPS62872 TPS62873 PWM-CCM Operation
IOUT = 2A
Figure 10-16 PWM-CCM Operation
TPS62870 TPS62871 TPS62872 TPS62873 PFM Operation
IOUT = 75mA
Figure 10-18 PFM Operation
TPS62870 TPS62871 TPS62872 TPS62873 Synchronization to an External Clock
Load = 0.75ΩFSEL = 2.25MHzf(SYNC) = 2MHz
Figure 10-20 Synchronization to an External Clock
TPS62870 TPS62871 TPS62872 TPS62873 Shutdown Using the EN Pin (Discharge Enabled)
Load = 7.5Ω
Figure 10-22 Shutdown Using the EN Pin (Discharge Enabled)
TPS62870 TPS62871 TPS62872 TPS62873 Current Limit (Hiccup)Figure 10-24 Current Limit (Hiccup)
TPS62870 TPS62871 TPS62872 TPS62873 Load Regulation
VOUT = 0.4V
Figure 10-3 Load Regulation
TPS62870 TPS62871 TPS62872 TPS62873 Load Regulation
VOUT = 0.5V
Figure 10-5 Load Regulation
TPS62870 TPS62871 TPS62872 TPS62873 Load Regulation
VOUT = 0.75V
Figure 10-7 Load Regulation
TPS62870 TPS62871 TPS62872 TPS62873 Load Regulation
VOUT = 0.875V
Figure 10-9 Load Regulation
TPS62870 TPS62871 TPS62872 TPS62873 Load Regulation
VOUT = 1.05V
Figure 10-11 Load Regulation
TPS62870 TPS62871 TPS62872 TPS62873 Output Voltage Ripple
IOUT = 15AVOUT = 0.875V
Figure 10-13 Output Voltage Ripple
TPS62870 TPS62871 TPS62872 TPS62873 Load Transient Response
ΔIOUT = 7.5A CH1 = 50mV/A
Figure 10-15 Load Transient Response
TPS62870 TPS62871 TPS62872 TPS62873 PWM-DCM Operation
IOUT = 750mA
Figure 10-17 PWM-DCM Operation
TPS62870 TPS62871 TPS62872 TPS62873 Spread Spectrum Operation
VOUT = 0.75VIOUT = 11.5A
Figure 10-19 Spread Spectrum Operation
TPS62870 TPS62871 TPS62872 TPS62873 Start-Up Using the EN Pin
Load = 0.75Ω
Figure 10-21 Start-Up Using the EN Pin
TPS62870 TPS62871 TPS62872 TPS62873 Shutdown (Discharge disabled)
Load = 7.5Ω
Figure 10-23 Shutdown (Discharge disabled)