JAJSLY4B January   2023  – May 2024 TPS62870 , TPS62871 , TPS62872 , TPS62873

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 概要 (続き)
  6. 5 Device Options
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings_Catalog
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 I2C Interface Timing Characteristics
    7. 7.7 Timing Requirements
    8. 7.8 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Fixed-Frequency DCS Control Topology
      2. 8.3.2  Forced PWM and Power Save Modes
      3. 8.3.3  Precise Enable
      4. 8.3.4  Start-Up
      5. 8.3.5  Switching Frequency Selection
      6. 8.3.6  Output Voltage Setting
        1. 8.3.6.1 Output Voltage Range
        2. 8.3.6.2 Output Voltage Setpoint
        3. 8.3.6.3 Non-Default Output Voltage Setpoint
        4. 8.3.6.4 Dynamic Voltage Scaling
      7. 8.3.7  Compensation (COMP)
      8. 8.3.8  Mode Selection and Clock Synchronization (MODE/SYNC)
      9. 8.3.9  Spread Spectrum Clocking (SSC)
      10. 8.3.10 Output Discharge
      11. 8.3.11 Undervoltage Lockout (UVLO)
      12. 8.3.12 Overvoltage Lockout (OVLO)
      13. 8.3.13 Overcurrent Protection
        1. 8.3.13.1 Cycle-by-Cycle Current Limiting
        2. 8.3.13.2 Hiccup Mode
        3. 8.3.13.3 Current Limit Mode
      14. 8.3.14 Power Good (PG)
        1. 8.3.14.1 Standalone or Primary Device Behavior
        2. 8.3.14.2 Secondary Device Behavior
      15. 8.3.15 Remote Sense
      16. 8.3.16 Thermal Warning and Shutdown
      17. 8.3.17 Stacked Operation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset
      2. 8.4.2 Undervoltage Lockout
      3. 8.4.3 Standby
      4. 8.4.4 On
    5. 8.5 Programming
      1. 8.5.1 Serial Interface Description
      2. 8.5.2 Standard, Fast, Fast Mode Plus Protocol
      3. 8.5.3 I2C Update Sequence
      4. 8.5.4 I2C Register Reset
  10. 9 Register Map
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Selecting the Inductor
        2. 10.2.2.2 Selecting the Input Capacitors
        3. 10.2.2.3 Selecting the Compensation Resistor
        4. 10.2.2.4 Selecting the Output Capacitors
        5. 10.2.2.5 Selecting the Compensation Capacitor, CC
        6. 10.2.2.6 Selecting the Compensation Capacitor, CC2
      3. 10.2.3 Application Curves
    3. 10.3 Best Design Practices
    4. 10.4 Power Supply Recommendations
    5. 10.5 Layout
      1. 10.5.1 Layout Guidelines
      2. 10.5.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 サード・パーティ製品に関する免責事項
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.13.1 Cycle-by-Cycle Current Limiting

If the peak inductor current increases above the high-side current limit threshold, the device turns off the high-side switch and turns on the low-side switch to ramp down the inductor current. The device only turns on the high-side switch again if the inductor current has decreased below the low-side current limit threshold.

Note that because of the propagation delay of the current limit comparator, the current limit threshold in practice can be greater than the DC value specified in the Electrical Characteristics. The current limit in practice is given by:

Equation 3.
TPS62870 TPS62871 TPS62872 TPS62873

where:

  • IL is the inductor current.
  • ILIMH is the high-side current limit threshold measured at DC.
  • VIN is the input voltage.
  • VOUT is the output voltage.
  • L is the effective inductance at the peak current level.
  • tpd is the propagation delay of the current limit comparator (typically 5ns).