JAJSM97D June   2021  – August 2022 TPS62932 , TPS62933 , TPS62933F , TPS62933O , TPS62933P

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 概要 (続き)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Fixed Frequency Peak Current Mode
      2. 9.3.2  Pulse Frequency Modulation
      3. 9.3.3  Voltage Reference
      4. 9.3.4  Output Voltage Setting
      5. 9.3.5  Switching Frequency Selection
      6. 9.3.6  Enable and Adjusting Undervoltage Lockout
      7. 9.3.7  External Soft Start and Prebiased Soft Start
      8. 9.3.8  Power Good
      9. 9.3.9  Minimum On Time, Minimum Off Time, and Frequency Foldback
      10. 9.3.10 Frequency Spread Spectrum
      11. 9.3.11 Overvoltage Protection
      12. 9.3.12 Overcurrent and Undervoltage Protection
      13. 9.3.13 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Modes Overview
      2. 9.4.2 Heavy Load Operation
      3. 9.4.3 Light Load Operation
      4. 9.4.4 Out of Audio Operation
      5. 9.4.5 Forced Continuous Conduction Operation
      6. 9.4.6 Dropout Operation
      7. 9.4.7 Minimum On-Time Operation
      8. 9.4.8 Shutdown Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1  Custom Design With WEBENCH® Tools
        2. 10.2.2.2  Output Voltage Resistors Selection
        3. 10.2.2.3  Choosing Switching Frequency
        4. 10.2.2.4  Soft-Start Capacitor Selection
        5. 10.2.2.5  Bootstrap Capacitor Selection
        6. 10.2.2.6  Undervoltage Lockout Setpoint
        7. 10.2.2.7  Output Inductor Selection
        8. 10.2.2.8  Output Capacitor Selection
        9. 10.2.2.9  Input Capacitor Selection
        10. 10.2.2.10 Feedforward Capacitor CFF Selection
        11. 10.2.2.11 Maximum Ambient Temperature
      3. 10.2.3 Application Curves
    3. 10.3 What to Do and What Not to Do
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
      2. 13.1.2 Development Support
        1. 13.1.2.1 Custom Design With WEBENCH® Tools
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 サポート・リソース
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.3.2 Pulse Frequency Modulation

The TPS62932, TPS62933, and TPS62933P are designed to operate in pulse frequency modulation (PFM) mode at light load currents to boost light load efficiency.

When the load current is lower than half of the peak-to-peak inductor current in CCM, the devices operate in discontinuous conduction mode (DCM). In DCM operation, the low-side switch is turned off when the inductor current drops to ILS_ZC to improve efficiency. Both switching losses and conduction losses are reduced in DCM, compared to forced CCM operation at light load.

At even lighter current load, pulse frequency modulation (PFM) mode is activated to maintain high-efficiency operation. When either the minimum high-side switch on time, tON_MIN, or the minimum peak inductor current IPEAK_MIN is reached, the switching frequency decreases to maintain regulation. In PFM mode, the switching frequency is decreased by the control loop to maintain output voltage regulation when load current reduces. Switching loss is further reduced in PFM operation due to less frequent switching actions. Since the integrated current comparator catches the peak inductor current only, the average load current entering PFM mode varies with the applications and external output LC filters.

In PFM mode, the high-side MOSFET is turned on in a burst of one or more pulses to provide energy to the load. The duration of the burst depends on how long it takes the feedback voltage catches VREF. The periodicity of these bursts is adjusted to regulate the output, while zero current crossing detection turns off the low-side MOSFET to maximize efficiency. This mode provides high light-load efficiency by reducing the amount of input supply current required to regulate the output voltage at small loads. This trades off very good light-load efficiency for larger output voltage ripple and variable switching frequency.