JAJSM97D June   2021  – August 2022 TPS62932 , TPS62933 , TPS62933F , TPS62933O , TPS62933P

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 概要 (続き)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Fixed Frequency Peak Current Mode
      2. 9.3.2  Pulse Frequency Modulation
      3. 9.3.3  Voltage Reference
      4. 9.3.4  Output Voltage Setting
      5. 9.3.5  Switching Frequency Selection
      6. 9.3.6  Enable and Adjusting Undervoltage Lockout
      7. 9.3.7  External Soft Start and Prebiased Soft Start
      8. 9.3.8  Power Good
      9. 9.3.9  Minimum On Time, Minimum Off Time, and Frequency Foldback
      10. 9.3.10 Frequency Spread Spectrum
      11. 9.3.11 Overvoltage Protection
      12. 9.3.12 Overcurrent and Undervoltage Protection
      13. 9.3.13 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Modes Overview
      2. 9.4.2 Heavy Load Operation
      3. 9.4.3 Light Load Operation
      4. 9.4.4 Out of Audio Operation
      5. 9.4.5 Forced Continuous Conduction Operation
      6. 9.4.6 Dropout Operation
      7. 9.4.7 Minimum On-Time Operation
      8. 9.4.8 Shutdown Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1  Custom Design With WEBENCH® Tools
        2. 10.2.2.2  Output Voltage Resistors Selection
        3. 10.2.2.3  Choosing Switching Frequency
        4. 10.2.2.4  Soft-Start Capacitor Selection
        5. 10.2.2.5  Bootstrap Capacitor Selection
        6. 10.2.2.6  Undervoltage Lockout Setpoint
        7. 10.2.2.7  Output Inductor Selection
        8. 10.2.2.8  Output Capacitor Selection
        9. 10.2.2.9  Input Capacitor Selection
        10. 10.2.2.10 Feedforward Capacitor CFF Selection
        11. 10.2.2.11 Maximum Ambient Temperature
      3. 10.2.3 Application Curves
    3. 10.3 What to Do and What Not to Do
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
      2. 13.1.2 Development Support
        1. 13.1.2.1 Custom Design With WEBENCH® Tools
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 サポート・リソース
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10.2.2.9 Input Capacitor Selection

The TPS6293x device requires an input decoupling capacitor and, depending on the application, a bulk input capacitor. The typical recommended value for the decoupling capacitor is 10 μF, and an additional 0.1-µF capacitor from the VIN pin to ground is recommended to provide high frequency filtering.

The value of a ceramic capacitor varies significantly over temperature and the amount of DC bias applied to the capacitor. X5R and X7R ceramic dielectrics are recommended because they have a high capacitance-to-volume ratio and are fairly stable over temperature. The capacitor must also be selected with the DC bias taken into account. The effective capacitance value decreases as the DC bias increases.

The capacitor voltage rating needs to be greater than the maximum input voltage. The capacitor must also have a ripple current rating greater than the maximum input current ripple. The input ripple current can be calculated using Equation 22.

Equation 22. GUID-20210110-CA0I-2XNF-V6RN-Q0RKZK0T98VH-low.gif

For this example design, two TDK CGA5L1X7R1H106K160AC (10-μF, 50-V, 1206, X7R) capacitors have been selected. The effective capacitance under input voltage of 24 V for each one is 3.45 μF. The input capacitance value determines the input ripple voltage of the converter. The input voltage ripple can be calculated using Equation 23. Using the design example values, IOUT_MAX = 3 A, CIN_EFF = 2 × 3.45 = 6.9 μF, and fSW = 500 kHz, yields an input voltage ripple of 222 mV and a RMS input ripple current of 1.22 A.

Equation 23. GUID-20210125-CA0I-Z0G8-MPKF-PT2M9QCZ5VKP-low.gif

where

  • RESR_MAX is the maximum series resistance of the input capacitor, which is approximately 1.5 mΩ of two capacitors in paralleled.