JAJSHS1D July   2013  – August 2019 TPS63050 , TPS63051

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図(WCSP)
      2.      効率と出力電流との関係
  4. 4 改訂履歴
  5. 5 概要（続き）
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Switching Characteristics
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
      1. 9.3.1 Power Good
      2. 9.3.2 Overvoltage Protection
      3. 9.3.3 Undervoltage Lockout (UVLO)
      4. 9.3.4 Thermal Shutdown
      5. 9.3.5 Soft Start
      6. 9.3.6 Short Circuit Protection
    4. 9.4 Device Functional Modes
      1. 9.4.1 Control Loop Description
      2. 9.4.2 Power Save Mode Operation
      3. 9.4.3 Adjustable Current Limit
      4. 9.4.4 Device Enable
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Custom Design With WEBENCH® Tools
        2. 10.2.2.2 Output Filter Design
        3. 10.2.2.3 Inductor Selection
        4. 10.2.2.4 Capacitor selection
          1. 10.2.2.4.1 Input Capacitor
          2. 10.2.2.4.2 Output Capacitor
        5. 10.2.2.5 Setting the Output Voltage
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example (WCSP)
    3. 12.3 Layout Example (HotRod)
    4. 12.4 Thermal Considerations
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 WEBENCH®ツールによるカスタム設計
    2. 13.2 デバイス・サポート
      1. 13.2.1 デベロッパー・ネットワークの製品に関する免責事項
    3. 13.3 関連リンク
    4. 13.4 ドキュメントの更新通知を受け取る方法
    5. 13.5 コミュニティ・リソース
    6. 13.6 商標
    7. 13.7 静電気放電に関する注意事項
    8. 13.8 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.4.1 Control Loop Description

TPS63050 TPS63051 Averagecurrent_mode_rev5.gifFigure 6. Average Current Mode Control

The controller circuit of the device is based on an average current mode topology. The average inductor current is regulated by a fast current regulator loop which is controlled by a voltage control loop. Figure 6 shows the control loop.

The noninverting input of the transconductance amplifier, gmv, is assumed to be constant. The output of gmv defines the average inductor current. The inductor current is reconstructed by measuring the current through the high side buck MOSFET. This current corresponds exactly to the inductor current in boost mode. In buck mode the current is measured during the on time of the same MOSFET. During the off time, the current is reconstructed internally starting from the peak value at the end of the on time cycle. The average current and the feedback from the error amplifier gmv forms the correction signal gmc. This correction signal is compared to the buck and the boost sawtooth ramp giving the PWM signal. Depending on which of the two ramps the gmc output crosses either the Buck or the Boost stage is initiated. When the input voltage is close to the output voltage, one buck cycle is always followed by a boost cycle. In this condition, no more than three cycles in a row of the same mode are allowed. This control method in the buck-boost region ensures a robust control and the highest efficiency.