JAJSCD1B June   2016  – March 2019 TPS63070

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      効率と出力電流との関係、、Vo = 5V
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram TPS63070
    3. 8.3 Functional Block Diagram TPS630701
    4. 8.4 Feature Description
      1. 8.4.1  Control Loop Description
      2. 8.4.2  Precise Enable
      3. 8.4.3  Power Good
      4. 8.4.4  Soft Start
      5. 8.4.5  PS/SYNC
      6. 8.4.6  Short Circuit Protection
      7. 8.4.7  VSEL and FB2 pins
      8. 8.4.8  Overvoltage Protection
      9. 8.4.9  Undervoltage Lockout
      10. 8.4.10 Overtemperature Protection
    5. 8.5 Device Functional Modes
      1. 8.5.1 Power Save Mode
      2. 8.5.2 Current Limit
      3. 8.5.3 Output Discharge Function (TPS630702 only)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application for adjustable version
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Programming The Output Voltage
        2. 9.2.2.2 Inductor Selection
        3. 9.2.2.3 Capacitor Selection
          1. 9.2.2.3.1 Input Capacitor
          2. 9.2.2.3.2 Output Capacitor
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application for Fixed Voltage Version
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
      3. 9.3.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Thermal Information
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 12.2 関連リンク
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3 Recommended Operating Conditions

over operating junction temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Supply voltage at VIN 2.0 16 V
Output Voltage 2.5 9 V
Effective Inductance 0.7 1.5 2.8 µH
Capacitance connected to VIN pin 4.7 10 µF
Capacitance connected to VAUX pin 100 nF
Total capacitance connected to VOUT pin (1) 15 47 470 µF
duty cycle in buck mode over recommended operating conditions 30 %
duty cycle in buck mode over recommended operating conditions but effective output capacitance Cout,eff ≥ 40uF; effective inductance L,eff = 0.7µH to 1.8uH 20 %
Operating junction temperature range, TJ –40 125 °C
(1) Due to the dc bias effect of ceramic capacitors, the effective capacitance is lower than the nominal value when a voltage is applied. This is why the capacitance is specified to allow the selection of the minimal capacitor required with the dc bias effect for this type of capacitor in mind. The capacitance range given above is for the nominal inductance of 1.5 µH. Please also see the detailed design procedure in the application section about the ratio of inductance and minimum output capacitance.