JAJSCD1B June 2016 – March 2019 TPS63070
PRODUCTION DATA.
For all switching power supplies, the layout is an important step in the design, especially at high peak currents and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground connection. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC. Use a common ground node for power ground and a different one for control ground to minimize the effects of ground noise. Connect these ground nodes at any place close to one of the ground pin of the IC.
A ceramic capacitor each, as close as possible from the VIN pin to GND and one from the VOUT pin to GND, shown as C1 and C4 in the layout proposal are used to suppress high frequency noise. The case size should be 0603 or smaller for good high frequency performance. Additional 0805 size input and output capacitors are used to get the required capacitance on the input and output depending on the supply voltage range and the output voltage.
The feedback divider should be placed as close as possible to the feedback pin of the IC. To lay out the control ground, short traces are recommended as well, separation from the power ground traces. This avoids ground shift problems, which can occur due to superimposition of power ground current and control ground current.
In case any of the digital inputs EN, VSEL or PS/SYNC need to be tied to the input supply voltage VIN, a 10k resistor must be used in series. One common resistor for all digital inputs that are tied to VIN is sufficient.