SLVS810C June   2009  – September 2015 TPS65000 , TPS650001 , TPS650003 , TPS650006 , TPS65001 , TPS650061

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Options
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Switching Characteristics
    7. 8.7 Dissipation Ratings
    8. 8.8 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Step-Down Converter
      2. 9.3.2 Soft Start
      3. 9.3.3 Linear Regulators
      4. 9.3.4 Oscillator and Spread Spectrum Clock Generation
      5. 9.3.5 Power Good
      6. 9.3.6 Supply Voltage Supervisor (SVS) [TPS65001 and TPS650061 Only]
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Typical TPS65000 Application
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Output Filter Design (Inductor and Output Capacitor)
            1. 10.2.1.2.1.1 Inductor Selection
            2. 10.2.1.2.1.2 Output Capacitor Selection
            3. 10.2.1.2.1.3 Input Capacitor Selection
        3. 10.2.1.3 Application Curves
      2. 10.2.2 Typical TPS65001 Application
        1. 10.2.2.1 Design Requirements
      3. 10.2.3 Typical TPS650001 Application
      4. 10.2.4 Typical TPS650061 Application
        1. 10.2.4.1 Design Requirements
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Related Links
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7 Pin Configuration and Functions

RTE Package
16-Pin WQFN With Exposed Thermal Pad
Top View
TPS65000 TPS65001 TPS650001 TPS650003 TPS650006 TPS650061 po_lvs810.gif
RUK Package
20-Pin WQFN With Exposed Thermal Pad
Top View
TPS65000 TPS65001 TPS650001 TPS650003 TPS650006 TPS650061 po_20_lvs810.gif

Pin Functions

PIN I/O DESCRIPTION
NAME 16-PIN RTE 20-PIN RUK
AGND 10 12 — Analog ground - Start back to PGND as close to the IC as possible.
EN_DCDC 8 10 I Enable DC-DC converter
EN_LDO1 1 3 I Enable LDO1
EN_LDO2 2 4 I Enable LDO2
FB_DCDC 9 11 I Voltage to DC-DC error amplifier
FB_LDO1 11 13 I Voltage to LDO1 error amplifier
FB_LDO2 14 16 I Voltage to LDO2 error amplifier
MODE 7 9 I Selects force PWM or PWM/PFM automatic-transition mode
MR — 1 I Active-low input to force a reset. (1)
PG 3 5 O Open-drain active low power good output.
PGND 4 6 — Power ground – Connected to the thermal pad
RST — 20 O Open-drain active low reset output
RSTSNS — 19 I Voltage for RST generation
SW 5 7 O Switch pin – connect inductor here
TRST — 2 I/O Capacitor connection for setting reset time
VINDCDC 6 8 I Input voltage to DC-DC converter and all other control blocks
VINLDO1 13 15 I Input voltage to LDO1
VINLDO2 16 18 I Input voltage to LDO2
VLDO1 12 14 O LDO1 output voltage
VLDO2 15 17 O LDO2 output voltage
(1) External pull up on MR is required.