JAJSF78L June 2006 – May 2018 TPS65023 , TPS65023B
PRODUCTION DATA.
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The INT pin combines the outputs of the PGOOD comparators from each DC–DC converter and the LDOs. The INT pin is used as a POWER_OK pin to indicate when all enabled supplies are in regulation. The INT pin remains active (low state) during power up as long as all enabled power rails are below their regulation limit. Once the last enabled power rail is within regulation, the INT pin transitions to a high state.
During operation, if one of the enabled supplies goes out of regulation, INT transitions to a low state, and the corresponding bit in the PGOODZ register goes high. If the supply goes back to its regulation limits, INT transitions back to a high state.
While INT is in an active-low state, reading the PGOODZ register through the I2C bus forces INT into a high-Z state. Because this pin requires an external pullup resistor, the INT pin transitions to a logic high state even though the supply in question is still out of regulation. The corresponding bit in the PGOODZ register still indicates that the power rail is out of regulation.
Interrupts can be masked using the MASK register; default operation is not to mask any DCDC or LDO interrupts because this provides the POWER_OK function. If none of the DCDC converters or LDos are enabled, /INT defaults to a low state independently of the settings of the MASK register.