SLVSC01A June   2013  – April 2015 TPS65133

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Typical Application
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Boost Converter (VPOS)
        1. 8.3.1.1 Switching Frequency (VPOS)
        2. 8.3.1.2 Output Voltage (VPOS)
        3. 8.3.1.3 Startup (VPOS)
        4. 8.3.1.4 Shutdown (VPOS)
        5. 8.3.1.5 Active Discharge (VPOS)
        6. 8.3.1.6 Short-Circuit Protection (VPOS)
      2. 8.3.2 Inverting Buck-Boost Converter (VNEG)
        1. 8.3.2.1 Switching Frequency (VNEG)
        2. 8.3.2.2 Output Voltage (VNEG)
        3. 8.3.2.3 Startup (VNEG)
        4. 8.3.2.4 Shutdown
        5. 8.3.2.5 Active Discharge (VNEG)
        6. 8.3.2.6 Short-Circuit Protection (VNEG)
      3. 8.3.3 Startup and Shutdown Sequencing
      4. 8.3.4 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation with VI < 2.9 V
      2. 8.4.2 Operation with VI ≈ VPOS (Diode Mode)
      3. 8.4.3 Operation with EN
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Capacitor Selection
      3. 9.2.3 Application Performance Graphs
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The TPS65133 device can be used to generate ±5-V supply rails from input supply voltages in the range 2.9 V to 5 V, and has been optimized for use with regulated 3.3-V rails and single-cell Li-Ion batteries. Its output voltages are fixed at ±5 V and cannot be changed by the user. Both output voltages are controlled by the EN pin: a high logic level on the EN pin enables both outputs, and a low logic level disables them. Note that when the input supply voltage is above the UVLO threshold and the EN pin is low, both outputs are disabled and actively discharged to ground. When the input supply voltage is below the UVLO threshold, both outputs are disabled, but they are not actively discharged.

9.2 Typical Application

Figure 9 shows a typical application schematic suitable for supplying up to 250 mA at ±5 V from e.g. a single-cell Li-Ion battery.

TPS65133 Application_Schematic_SLVSC01.gifFigure 9. Typical Application Circuit

9.2.1 Design Requirements

The design parameters for the application circuit in Figure 9 are listed in Table 1.

Table 1. Design Parameters

PARAMETERS EXAMPLE VALUES
Input voltage range 2.9 V to 5.0 V
Output voltage ±5.0 V
Switching frequency 1.7 MHz

9.2.2 Detailed Design Procedure

In order to maximize performance, the TPS65133 device has been optimized for use with a relatively narrow range of external components, and customers are recommended to use the application circuit shown in Figure 9 and the components listed in Table 2 and Table 3.

9.2.2.1 Inductor Selection

The two dc-dc converters in the TPS65133 device have been optimized for use with 4.7 µH inductors, and it is recommended to use this value in all applications. Customers using different values of inductors should characterize performance thoroughly before going to mass production.

Table 2. Inductor Selection

PARAMETER VALUE MANUFACTURER PART NUMBER
L1, L2 4.7 µH Coilmaster MMPP252012-4R7N
Toko 1239AS-H-4R7M
ABCO LPP252012-4R7N
Coilcraft XFL4020-4R7ML

9.2.2.2 Capacitor Selection

The recommended capacitor values are shown in Table 3. Applications using less than the recommended capacitance (e.g. to save PCB area) may experience increased voltage ripple. In general, the lower the output power required by the application, the lower the capacitance needed for proper performance. C4 improves immunity to noise on the input supply voltage, but it is not necessary in many applications.

Table 3. Capacitor Selection

PARAMETER VALUE MANUFACTURER PART NUMBER
C1, C2, C3 10 µF Murata GRM21BR71A106KE51
C4 100 nF GRM21BR71E104KA01

9.2.3 Application Performance Graphs

The performance shown in the following graphs was obtained using the circuit shown in Figure 9 and the external components listed in Table 2 and Table 3.

(1) The Toko inductor was used to obtain the application graphs.

TPS65133 App_Perf_01_SLVSC01.png
Figure 10. Efficiency vs Output Current
TPS65133 App_Perf_03_SLVSC01.png
VI = 3.7 V
Figure 12. VNEG Line Regulation
TPS65133 App_Perf_05_SLVSC01.png
Figure 14. VNEG Load Regulation
TPS65133 VIN_3p7_startup_IPOS_100ma_INEG_100ma.png
VI = 3.7 V, IPOS = INEG = 100 mA
Figure 16. VPOS and VNEG Startup Behavior (100 mA)
TPS65133 VIN_3p7_shutdown_IPOS_100ma_INEG_100ma.png
VI = 3.7 V, IPOS = INEG = 100 mA
Figure 18. VPOS and VNEG Shutdown Behavior (100 mA)
TPS65133 VIN_3p7_VPOS_100mA.png
VI = 3.7 V, IPOS = 100 mA
Figure 20. VPOS Switching Waveforms (100 mA)
TPS65133 VIN_3p7_to_4p2_VPOS_50mA.png
VI = 3.7 V to 4.2 V, IPOS = 50 mA
Figure 22. VPOS Line Transient
TPS65133 VIN_3p7_VNEG_100mA.png
VI = 3.7 V, INEG = 100 mA
Figure 24. VNEG Switching Waveforms (100 mA)
TPS65133 VIN_3p7_to_4p2_VNEG_50mA.png
VI = 3.7 V to 4.2 V, INEG = 50 mA
Figure 26. VNEG Line Transient
TPS65133 App_Perf_02_SLVSC01.png
VI = 3.7 V
Figure 11. VPOS Line Regulation
TPS65133 App_Perf_04_SLVSC01.png
Figure 13. VPOS Load Regulation
TPS65133 VIN_3p7_startup_IPOS_0ma_INEG_0ma.png
VI = 3.7 V, IPOS = INEG = 0 mA
Figure 15. VPOS and VNEG Startup Behavior (0 mA)
TPS65133 VIN_3p7_shutdown_IPOS_0ma_INEG_0ma.png
VI = 3.7 V, IPOS = INEG = 0 mA
Figure 17. VPOS and VNEG Shutdown Behavior (0 mA)
TPS65133 VIN_3p7_VPOS_10mA.png
VI = 3.7 V, IPOS = 10 mA
Figure 19. VPOS Switching Waveforms (10 mA)
TPS65133 VIN_3p7_VPOS_50mA_to_200mA.png
VI = 3.7 V, IPOS = 50 mA to 200 mA
Figure 21. VPOS Load Transient
TPS65133 VIN_3p7_VNEG_10mA.png
VI = 3.7 V, INEG = 10 mA
Figure 23. VNEG Switching Waveforms (10 mA)
TPS65133 VIN_3p7_INEG_50ma_to_200ma1.png
VI = 3.7 V, INEG = 50 mA to 200 mA
Figure 25. VNEG Load Transient
TPS65133 App_Perf_fsw_SLVSC01.png
IPOS = INEG = 100 mA
Figure 27. Switching Frequency