JAJSI26A November 2019 – February 2021 TPS6521815
PRODUCTION DATA
MIN | NOM | MAX | UNIT | |||
---|---|---|---|---|---|---|
fSCL | Serial clock frequency | 100 | kHz | |||
400 | ||||||
tHD;STA | Hold time (repeated) START condition. After this period, the first clock pulse is generated. | SCL = 100 kHz | 4 | µs | ||
SCL = 400 kHz | 600 | ns | ||||
tLOW | LOW period of the SCL clock | SCL = 100 kHz | 4.7 | µs | ||
SCL = 400 kHz | 1.3 | |||||
tHIGH | HIGH period of the SCL clock | SCL = 100 kHz | 4 | µs | ||
SCL = 400 kHz(1) | 1 | |||||
tSU;STA | Set-up time for a repeated START condition | SCL = 100 kHz | 4.7 | µs | ||
SCL = 400 kHz | 600 | ns | ||||
tHD;DAT | Data hold time | SCL = 100 kHz | 0 | 3.45 | µs | |
SCL = 400 kHz | 0 | 900 | ns | |||
tSU;DAT | Data set-up time | SCL = 100 kHz | 250 | ns | ||
SCL = 400 kHz | 100 | |||||
tr | Rise time of both SDA and SCL signals | SCL = 100 kHz | 1000 | ns | ||
SCL = 400 kHz | 300 | |||||
tf | Fall time of both SDA and SCL signals | SCL = 100 kHz | 300 | ns | ||
SCL = 400 kHz | 300 | |||||
tSU;STO | Set-up time for STOP condition | SCL = 100 kHz | 4 | µs | ||
SCL = 400 kHz | 600 | ns | ||||
tBUF | Bus free time between STOP and START condition | SCL = 100 kHz | 4.7 | µs | ||
SCL = 400 kHz | 1.3 | |||||
tSP | Pulse width of spikes which must be suppressed by the input filter | SCL = 100 kHz | —(2) | —(2) | ns | |
SCL = 400 kHz | 0 | 50 | ||||
Cb | Capacitive load for each bus line | SCL = 100 kHz | 400 | pF | ||
SCL = 400 kHz | 400 |