JAJSOR4B December 2022 – June 2024 TPS65220
PRODUCTION DATA
This pin can be configured as an alternative MODE pin (in case MODE/STBY is configured for STBY-function) or as a RESET pin. The configuration of the pin is selected by MODE_RESET_CONFIG in MFP_2_CONFIG register. The polarity of this pin can be configured by writing to MODE_RESET_POLARITY in MFP_1_CONFIG register. The polarity-configuration must not change after power-up. Only MODE/RESET or MODE/STBY must be configured as MODE. If both are configured as MODE, MODE/RESET takes priority and MODE/STBY is ignored.
MODE/RESET configured as 'MODE':
MODE/RESET configured as 'RESET':
All other bits, even in the same register, remain at their current state. For example, LDOx_LSW_CONFIG, BUCKx_BW_SEL, BUCKx_UV_THR_SEL and the MFP_1_CONFIG register bits do NOT get reset during a WARM-reset.
WARM Reset cannot override the VSEL_SD-pin command. In other words: even if a WARM Reset occurs, if the VSEL_SD pin is commanding 1.8V-LDO mode, that remain in effect.
Reset requests, via pin or I2c, are only serviced in ACTIVE state, STBY state, or a transition between these two states.
Please see below truth-table for pin- and I2C-commands.
Pin Name |
Pin Configuration (MODE_RESET_CONFIG) |
Pin Polarity (MODE_RESET_POLARIT Y) |
Pin state (schematic) |
I2C control (MODE_I2C_CTRL) |
Resulting Function |
---|---|---|---|---|---|
MODE/RESET |
MODE* |
x |
x |
1h |
forced PWM |
MODE/RESET |
MODE* |
0h |
L |
0h |
auto-PFM |
MODE/RESET |
MODE* |
0h |
H |
0h |
forced PWM |
MODE/RESET |
MODE* |
1h |
L |
0h |
forced PWM |
MODE/RESET |
MODE* |
1h |
H |
0h |
auto-PFM |
MODE/RESET |
RESET |
0 |
L |
x |
RESET |
MODE/RESET |
RESET |
0 |
H |
x |
normal operation |
MODE/RESET |
RESET |
1 |
L |
x |
normal operation |
MODE/RESET |
RESET |
1 |
H |
x |
RESET |
The * for MODE indicates that the MODE/RESET pin takes priority in case both, MODE/RESET and MODE/STBY are configured as 'MODE', and thus the respective pin to be observed is MODE/RESET.