JAJSFS2D November   2015  – May 2021 TPS65235

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Boost Converter
      2. 7.3.2  Linear Regulator and Current Limit
      3. 7.3.3  Boost Converter Current Limit
      4. 7.3.4  Charge Pump
      5. 7.3.5  Slew Rate Control
      6. 7.3.6  Short Circuit Protection, Hiccup and Overtemperature Protection
      7. 7.3.7  Tone Generation
      8. 7.3.8  Tone Detection
      9. 7.3.9  Disable and Enable
      10. 7.3.10 Component Selection
        1. 7.3.10.1 Boost Inductor
        2. 7.3.10.2 Capacitor Selection
        3. 7.3.10.3 Surge Components
        4. 7.3.10.4 Consideration for Boost Filtering and LNB Noise
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 Serial Interface Description
      2. 7.5.2 TPS65235 I2C Update Sequence
    6. 7.6 Register Maps
      1. 7.6.1 Control Register 1 (address = 0x00H) [reset = 00010000]
      2. 7.6.2 Control Register 2 (address = 0x01H) [reset = 0000101]
      3. 7.6.3 Status Register (address = 0x02H) [reset = x0100000]
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application for DiSEqc1.x Support
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
      4. 8.2.4 Typical Application for DiSEqc2.x Support
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
        3. 8.2.4.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 サポート・リソース
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

GUID-CA8D1684-0869-4698-AFB1-B8528F3578A3-low.gifFigure 5-1 20 Pin (WQFN-20)RUK Package(Top View)
Table 5-1 Pin Functions
PIN I/O(1) DESCRIPTION
NAME NO.
LX 1 I Switching node of the boost converter
VIN 2 S Input of internal linear regulator
VCC 3 O Internal 6.3-V power supply. Connect a 1-μF ceramic capacitor from this pin to ground. When VIN is 5 V, connect VCC to VIN.
AGND 4 S Analog ground. Connect all ground pins and power pad together.
TCAP 5 O Connect a capacitor to this pin to set the rise time of the LNB output.
ISET 6 O Connect a resistor to this pin to set the LNB output current limit.
EN 7 I Enable pin to enable the VLNB output; pull to ground to disable output, and output will be pulled to ground, when the EN is low, the I2C can be accessed
FAULT 8 O Oopen drain output pin, it goes low if any fault flag is set.
ADDR 9 I Connecting different resistor to this pin to set different I2C address, see Table 7-4.
VCTRL 10 I Voltage level at this pin to set the output voltage, see Table 7-3.
SDA 11 I/O I2C compatible bi-directional data
SCL 12 I I2C compatible clock input
EXTM 13 I External modulation logic input pin which activates the 22-kHz tone output, feeding signal can be 22-kHz tone or logic high or low.
DOUT 14 O Tone detection output
DIN 15 I Tone detection input
VLNB 16 O Output of the power supply connected to satellite receiver or switch.
VCP 17 O Gate drive supply voltage, output of charge pump, connect a capacitor between this pin to pin VLNB.
BOOST 18 O Output of the boost regulator and Input voltage of the internal linear regulator.
GDR 19 O Control the gate of the external MOSFET for DiSEqc 2.x support.
PGND 20 S Power ground for Boost Converter
Thermal PAD Must be soldered to PCB for optimal thermal performance. Have thermal Vias on the PCB to enhance power dissipation.
(1) I = input, O = output, I/O = input and output, S = power supply