JAJSBH8G June   2010  – February 2018 TPS65251

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      代表的なアプリケーションの回路図
  4. 改訂履歴
  5. 概要(続き)
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Adjustable Switching Frequency
      2. 8.3.2  Synchronization
      3. 8.3.3  Out-of-Phase Operation
      4. 8.3.4  Delayed Start-Up
      5. 8.3.5  Soft-Start Time
      6. 8.3.6  Adjusting the Output Voltage
      7. 8.3.7  Input Capacitor
      8. 8.3.8  Bootstrap Capacitor
      9. 8.3.9  Error Amplifier
      10. 8.3.10 Loop Compensation
      11. 8.3.11 Slope Compensation
      12. 8.3.12 Powergood
      13. 8.3.13 Current Limit Protection
      14. 8.3.14 Overvoltage Transient Protection
      15. 8.3.15 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Low-Power Mode Operation
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Loop Compensation Circuit
        2. 9.2.2.2  Selecting the Switching Frequency
        3. 9.2.2.3  Output Inductor Selection
        4. 9.2.2.4  Output Capacitor
        5. 9.2.2.5  Input Capacitor
        6. 9.2.2.6  Soft-Start Capacitor
        7. 9.2.2.7  Bootstrap Capacitor Selection
        8. 9.2.2.8  Adjustable Current Limiting Resistor Selection
        9. 9.2.2.9  Output Voltage and Feedback Resistors Selection
        10. 9.2.2.10 Compensation
        11. 9.2.2.11 3.3-V and 6.5-V LDO Regulators
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Power Dissipation
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントの更新通知を受け取る方法
    2. 12.2 コミュニティ・リソース
    3. 12.3 商標
    4. 12.4 静電気放電に関する注意事項
    5. 12.5 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Power Dissipation

The total power dissipation inside TPS65251 should not to exceed the maximum allowable junction temperature of 125°C. The maximum allowable power dissipation is a function of the thermal resistance of the package (RJA) and ambient temperature.

To calculate the temperature inside the device under continuous loading use the following procedure.

  1. Define the set voltage for each converter.
  2. Define the continuous loading on each converter. Make sure do not exceed the converter maximum loading.
  3. Determine from the graphs below the expected losses (Y axis) in watts per converter inside the device. The losses depend on the input supply, the selected switching frequency, the output voltage and the converter chosen.
  4. To calculate the maximum temperature inside the IC use the following formula:
  5. Equation 27. TPS65251 eq9_hotspot_lvsaa3.gif

    where

    • TA is the ambient temperature
    • PDIS is the sum of losses in all converters
    • θJA is the junction to ambient thermal impedance of the device and it is heavily dependant on board layout
TPS65251 buck1_vin_1a_lvsaa3.gif
VO (from top to bottom) = 5 V , 3.3 V, 2.5 V, 1.8 V, 1.2 V
Figure 36. Buck 1 Losses (W) vs Output Current
VIN = 12 V, ƒSW = 500 kHz
TPS65251 buck2_vin_1a_lvsaa3.gif
VO (from top to bottom) = 5 V , 3.3 V, 2.5 V, 1.8 V, 1.2 V
Figure 38. Buck 2 and 3 Losses (W) vs Output Current
VIN = 12 V, ƒSW = 500 kHz
TPS65251 buck1_vin_2a_lvsaa3.gif
VO (from top to bottom) = 5 V , 3.3 V, 2.5 V, 1.8 V, 1.2 V
Figure 37. Buck 1 Losses (W) vs Output Current
VIN = 12 V, ƒSW = 1.1 MHz
TPS65251 buck2_vin_2a_lvsaa3.gif
VO (from top to bottom) = 5 V , 3.3 V, 2.5 V, 1.8 V, 1.2 V
Figure 39. Buck 2 and 3 Losses (W) vs Output Current
VIN = 12 V, ƒSW = 1.1 MHz