JAJSQ67D december 2014 – may 2023 TPS65263-Q1
PRODUCTION DATA
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
N/A | SR3 | SR2 | SR1 | N/A | N/A | Mode2 | nEN2 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description | |
---|---|---|---|---|---|
7 | N/A | R/W | 0 | Not used | |
6 | SR3 | R/W | 0 | Vout2 VID voltage transition Slew Rate control. | |
5 | SR2 | R/W | 0 | 000: 10 mV/cycle; 010: 10 mV/4 cycles; 100: 10 mV/16 cycles; 110: 10 mV/64 cycles; | 001: 10 mV/2 cycles; 011: 10 mV/8 cycles; 101: 10 mV/32 cycles; 111: 10 mV/128 cycles |
4 | SR1 | R/W | 0 | ||
3 | N/A | R/W | 0 | Not used | |
2 | N/A | R/W | 0 | Not used | |
1 | Mode2 | R/W | 0 | 0: Enable buck 2 PSM operation at light load; 1: Forced buck 2 PWM mode operation | |
0 | nEN2 | R/W | 0 | 0: Enable buck2; 1: Disable buck2 |