SLVSAY9F December 2012 – March 2016 TPS65320-Q1
PRODUCTION DATA.
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TI recommends the following guidelines for PCB layout of the TPS65320-Q1 buck regulator. This layout example is based on TPS65320EVM (SLVU691).
Use a low-EMI inductor with a ferrite-type shielded core. Other types of inductors can be used; however, these inductors must have low-EMI characteristics and be located away from the low-power traces and components in the circuit.
Locate input ceramic filter capacitors in close proximity to the VIN pin. TI recommends surface-mount (SM) capacitors to minimize lead length and reduce noise coupling.
Route the feedback trace so that it has minimum interaction with any noise sources associated with the switching components. The recommended practice is to ensure the inductor is placed away from the feedback trace to prevent creating an EMI noise source.
All power (high-current) traces should be as thick and short as possible. The inductor and output capacitor of the buck regulator should be as close to each other as possible which reduces EMI radiated by the power traces because of high switching currents. In a two-sided PCB, TI recommends having ground planes on both sides of the PCB to help reduce noise and ground loop errors. The ground connection for the input and output capacitors and IC ground should connect to this ground plane. In a multi-layer PCB, the ground plane separates the power plane (where high switching currents and components are) from the signal plane (where the feedback trace and components are) for improved performance. Also, arrange the components such that the switching-current loops curl in the same direction. Place the high-current components such that during conduction the current path is in the same direction which prevents magnetic field reversal caused by the traces between the two half-cycles, and helps reduce radiated EMI.