JAJSE65
November 2017
TPS65320D-Q1
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
4
改訂履歴
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Buck Regulator
7.3.1.1
Fixed-Frequency PWM Control
7.3.1.2
Slope Compensation Output
7.3.1.3
Pulse-Skip Eco-mode™ Control Scheme
7.3.1.4
Dropout Mode Operation and Bootstrap Voltage (BOOT)
7.3.1.5
Error Amplifier
7.3.1.6
Voltage Reference
7.3.1.7
Adjusting the Output Voltage
7.3.1.8
Soft-Start Pin (SS)
7.3.1.9
Overload-Recovery Circuit
7.3.1.10
Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
7.3.1.11
Overcurrent Protection and Frequency Shift
7.3.1.12
Selecting the Switching Frequency
7.3.1.13
How to Interface to RT/CLK Pin
7.3.1.14
Overvoltage Transient Protection
7.3.1.15
Small-Signal Model for Loop Response
7.3.1.16
Simple Small-Signal Model for Peak-Current Mode Control
7.3.1.17
Small-Signal Model for Frequency Compensation
7.3.2
LDO Regulator
7.3.2.1
Charge-Pump Operation
7.3.2.2
Low-Voltage Tracking
7.3.2.3
Adjusting the Output Voltage
7.3.3
Thermal Shutdown
7.3.4
Power-Good Output, nRST
7.3.5
Enable and Undervoltage Lockout
7.4
Device Functional Modes
7.4.1
Modes of Operation
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
2.2-MHzSwitching Frequency, 9-V to 16-V Input, 5-V Output Buck Regulator, 3.3-V Output LDO Regulator
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.2.1
Switching Frequency Selection for the Buck Regulator
8.2.1.2.2
Output Inductor Selection for the Buck Regulator
8.2.1.2.3
Output Capacitor Selection for the Buck Regulator
8.2.1.2.4
Catch Diode Selection for the Buck Regulator
8.2.1.2.5
Input Capacitor Selection for the Buck Regulator
8.2.1.2.6
Soft-Start Capacitor Selection for the Buck Regulator
8.2.1.2.7
Bootstrap Capacitor Selection for the Buck Regulator
8.2.1.2.8
Output Voltage and Feedback Resistor Selection for the Buck Regulator
8.2.1.2.9
Frequency Compensation Selection for the Buck Regulator
8.2.1.2.10
LDO Regulator
8.2.1.2.11
Power Dissipation
8.2.1.2.11.1
Power Dissipation Losses of the Buck Regulator
8.2.1.2.12
Power Dissipation Losses of the LDO Regulator
8.2.1.2.13
Total Device Power Dissipation Losses and Junction Temperature
8.2.1.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
デバイスおよびドキュメントのサポート
11.1
ドキュメントのサポート
11.1.1
関連資料
11.2
ドキュメントの更新通知を受け取る方法
11.3
コミュニティ・リソース
11.4
商標
11.5
静電気放電に関する注意事項
11.6
Glossary
12
メカニカル、パッケージ、および注文情報
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
PWP|14
サーマルパッド・メカニカル・データ
PWP|14
PPTD331B
発注情報
jajse65_oa
jajse65_pm
4
改訂履歴
日付
改訂内容
注
2017年11月
*
初版