Table 42. PMBus Commands Used for Internal Operation

Table 43. Example Configuration Script for Internal Operation

9.2.1.2.1 Component Selection

9.2.1.2.1.1 Output Inductor Selection

Equation 9 gives the current ripple flowing in the inductor in CCM.

Equation 9.

where

• ΔI_L is the current ripple in the inductor.
• V_out is the output voltage.
• V_in is the input voltage of the converter.
• L is the value of the inductor in henry.
• ƒ_SW is the switching frequency of the converter.

Typically, the value of L is chosen to have the ripple current be 0.1× to 0.3× the full-load current. Choose the inductor so that the saturation current is higher than the maximum expected current plus half the current ripple at maximum operating temperature.

9.2.1.2.1.2 Output Capacitor Selection

The output capacitor needs to be properly sized to reduce voltage ripple due to the switching action (ripple voltage) and to reduce output voltage swings during transient load currents. Equation 10 gives the output voltage ripple.

Equation 10.

Equation 11 gives the voltage variation during output current transients.

Equation 11.

9.2.1.2.2 Internal Operation With Some Switchers Disabled

For applications where the internal settings for sequencing and soft-start are sufficient, all used output rails should have their enable terminals ENSWx tied high or floating and all unused output rails should have their enable pins ENSWx tied low for the default active ENABLE setting of ENABLE_PIN_CONFIG. This prevents the device from turning on an unused output by software default from an OPERATION ON request. This requirement extends to unpowered switchers; if a pair of switchers is unused, then both ENSWx pins must be tied low.

9.2.1.2.3 Internal Operation With All Switchers Enabled

For applications where all outputs rails will be used, it is sufficient to leave all enable terminals ENSWx disconnected and to set ENABLE_PIN_CONFIG to inactive.

9.2.1.2.4 Example Configuration

Figure 33 shows an internal sequencing schematic example where only switchers 1 to 3 are used for a set of timing requirements. If the internal configuration and fault handling is sufficient, and provided that the user configures the chip through SDA/SCL before placing it on a target board, then it is not necessary for a supervisory and housekeeping host controller chip like a MCU or DSP to be connected to the TPS65400-Q1. In such a case, digital terminals PGOOD, SSx/PG, SDA/SCL, I2CALERT, and CLK_OUT can be left unconnected with no pull-ups required, during normal operation. RST_N can be tied directly to VDDD (no pull-up required). I2CADDR can be tied directly to VDDD after programming. Control line CE can be left unconnected if the chip is constantly powered after VIN is provided.

PGOOD dependence disabled, switcher 4 disabled

Figure 33. Example Timing Diagram for Internal Sequencing

9.2.1.2.5 Unused Switchers

If the default setting active ENABLE of ENABLE_PIN_CONFIG is selected, ENSWx for unused switchers must always be tied low.

Table 44. PMBus Commands Used for Current Sharing With Single-Pin Enable⁽¹⁾

Table 45. Example Configuration Script for Current Sharing With Single-Pin Enable

9.2.2.2.1 Current Sharing Timing Example

Figure 43 shows an example configuration in which both the SW1-SW2 pair and SW3-SW4 pair are current shared. The enable pin of the slave converter can either follow the master converter or be floating. For the PGOOD pin, the slave PGOOD follows the master PGOOD. Due to internal pull-ups to VDDD on ENSWx lines, the user has an option to control ENSWx if an always on condition is desired.

A. External soft-start, single ENABLE

Figure 43. Example Timing Diagram for Current Sharing With Single-Pin Enable

Table 46. PMBus Commands Used for External Sequencing through VOUT

Table 47. Example Configuration Script for External Sequencing through VOUT

9.2.3.2.1 External Sequencing Through PG Pins

In an application where the programmable soft-start ramping rate is sufficient and where stop sequencing is not required, it is possible to wire Power Good pins (global PGOOD, PG) to enable pins (ENSWx) according to the desired start sequence. This is useful in cases where multiple PMUs are configured and the PG or global PGOOD output of one PMU is required to turn on an output of another PMU.

9.2.3.2.2 External Sequencing Through SW

In an application where output voltages exceed the threshold voltage of the enable pins ENSWx, it is possible to wire a properly divided VOUT directly to the enable pins according to the desired start sequence.

9.2.3.2.3 Example Configuration

Figure 45. Example Timing Diagram for External Sequencing Through VOUT