The OCP is I²C-programmable and set by the IOUT_MAX command. By default, the peak current IOUT_MAX for SW1 and SW2 is 6 A, and for SW3 and SW4 it is 3 A. When the current reaches this threshold, the unit immediately turns off the high-side FET and keeps the low-side FET off for the remainder of the switching cycle. The following cycle are skipped (high-side FET off, low-side FET off) regardless of the inductor current. If the current in the inductor is still higher than the IOUT_MAX after the skipped cycle, the following cycles are also skipped until the current reach below the IOUT_MAX.

If the IOUT_MAX is reached more than 256 active cycles continuously, the switcher shut downs for 20 ms and restarts. If the switcher is running in interleaved operation, both the switcher that tripped the IOUT_MAX threshold and its interleaved counterpart shut down for 20 ms. After that period of time, the unit restarts and goes through soft-start operation. For very-low duty cycle operation and faulty operation with very-fast current increase during the high-side FET on-time (due to inductor saturation and so forth), OCP is also enforced on the low side to ensure no runaway condition exists.

While the converter is shut down following an OCP event spanning more than 256 cycles, the COMP terminal is pulled low for 1.1 ms prior to precharge and re-enabling of the converter. At the same time, the SSx pin is discharged to AGND for 1.1 ms. If the soft-start is digital (SSx pins used as PGOODx outputs), the soft-start value is reset.

Figure 8-11 Inductor Current During Overcurrent Event

At high switching frequency (>1 MHz) and particularly when there is a fault in the converter such as saturation of the inductor, the current sensor might not sense the overcurrent event. To ensure that current protection is provided in all operating scenarios, low-side current sensing is also present to provide overcurrent detection and protection when the low-side FET is on. If over-current is detected when the low-side FET is on, the low-side FET stays on (and the high-side FET off) until the current drops below the threshold. A new cycle will then begin (high side on, low side off) when the next switching cycle occurs as driven by the internal clock derived from the oscillator (internal or external synchronization). A dedicated counter records the low-side OCP events and initiates a shutdown of the converter after 256 OCP event counts. Six consecutive cycles without a low-side OCP event resets the counter.

Figure 8-12 Inductor Current During Overcurrent Event With Low-Side Detection