SWCS046U March   2010  – October 2014 TPS65910

PRODUCTION DATA.  

  1. 1Device Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagram
  2. 2Revision History
  3. 3 Device Comparison
  4. 4Terminal Configuration and Functions
    1. 4.1 Signal Descriptions
  5. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  Handling Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Resistance Characteristics for RSL Package
    5. 5.5  I/O Pullup and Pulldown Characteristics
    6. 5.6  Digital I/O Voltage Electrical Characteristics
    7. 5.7  I2C Interface and Control Signals
    8. 5.8  Power Consumption
    9. 5.9  Power References and Thresholds
    10. 5.10 Thermal Monitoring and Shutdown
    11. 5.11 32-kHz RTC Clock
    12. 5.12 Backup Battery Charger
    13. 5.13 VRTC LDO
    14. 5.14 VIO SMPS
    15. 5.15 VDD1 SMPS
    16. 5.16 VDD2 SMPS
    17. 5.17 VDD3 SMPS
    18. 5.18 VDIG1 and VDIG2 LDO
    19. 5.19 VAUX33 and VMMC LDO
    20. 5.20 VAUX1 and VAUX2 LDO
    21. 5.21 VDAC and VPLL LDO
    22. 5.22 Timing and Switching Characteristics
      1. 5.22.1 Switch-On/-Off Sequences and Timing
        1. 5.22.1.1 BOOT1 = 0, BOOT0 = 0
        2. 5.22.1.2 BOOT1 = 0, BOOT0 = 1
      2. 5.22.2 Power Control Timing
        1. 5.22.2.1 Device Turn-On/Off With Rising/Falling Input Voltage
        2. 5.22.2.2 Device State Control Through PWRON Signal
        3. 5.22.2.3 Device SLEEP State Control
        4. 5.22.2.4 Power Supplies State Control Through the SCLSR_EN1 and SDASR_EN2 Signals
        5. 5.22.2.5 VDD1 and VDD2 Voltage Control Through SCLSR_EN1 and SDASR_EN2 Signals
        6. 5.22.2.6 SMPS Switching Synchronization
  6. 6Detailed Description
    1. 6.1  Power Reference
    2. 6.2  Power Sources
    3. 6.3  Embedded Power Controller
      1. 6.3.1 State-Machine
      2. 6.3.2 Switch-On/-Off Sequences
      3. 6.3.3 Control Signals
        1. 6.3.3.1 SLEEP
        2. 6.3.3.2 PWRHOLD
        3. 6.3.3.3 BOOT0/BOOT1
        4. 6.3.3.4 NRESPWRON
        5. 6.3.3.5 CLK32KOUT
        6. 6.3.3.6 PWRON
        7. 6.3.3.7 INT1
        8. 6.3.3.8 SDASR_EN2 and SCLSR_EN1
        9. 6.3.3.9 GPIO_CKSYNC
      4. 6.3.4 Dynamic Voltage Frequency Scaling and Adaptive Voltage Scaling Operation
    4. 6.4  32-kHz RTC Clock
    5. 6.5  RTC
      1. 6.5.1 Time Calendar Registers
      2. 6.5.2 General Registers
      3. 6.5.3 Compensation Registers
    6. 6.6  Backup Battery Management
    7. 6.7  Backup Registers
    8. 6.8  I2C Interface
    9. 6.9  Thermal Monitoring and Shutdown
    10. 6.10 Interrupts
    11. 6.11 Package Description
    12. 6.12 Functional Registers
      1. 6.12.1 TPS65910_FUNC_REG Registers Mapping Summary
      2. 6.12.2 TPS65910_FUNC_REG Register Descriptions
  7. 7Device and Documentation Support
    1. 7.1 Device Support
      1. 7.1.1 Development Support
      2. 7.1.2 Device Nomenclature
    2. 7.2 Documentation Support
    3. 7.3 Related Links
    4. 7.4 Community Resources
    5. 7.5 Trademarks
    6. 7.6 Electrostatic Discharge Caution
    7. 7.7 Export Control Notice
    8. 7.8 Glossary
    9. 7.9 Additional Acronyms
  8. 8Mechanical Packaging and Orderable Information
    1. 8.1 Packaging Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8 Mechanical Packaging and Orderable Information

8.1 Packaging Information

The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.