JAJSLW7B December 2020 – September 2023 TPS6593-Q1
PRODUCTION DATA
The TPS6593-Q1 device monitors the undervoltage (UV) and overvoltage (OV) conditions on the output voltages of the BUCK and LDO, regulators and VCCA (when it is expected to be 5 V or 3.3 V), and has the option to indicate the result with a PGOOD signal. Thermal warning can also be included in the result of the PGOOD monitor if it is not masked. Either voltage and current monitoring or only voltage monitoring can be selected for PGOOD indication. This selection is set by the PGOOD_SEL_BUCKn register bits for each BUCK regulator (select primary phase for multi-phase regulator), and is set by the PGOOD_SEL_LDOn register bits for each LDO regulator. When voltage and current are monitored, an active PGOOD signal active indicates that the regulator output is inside the Power-Good voltage window and that load current is below the current limit. If only voltage is monitored, then the current monitoring is ignored for the PGOOD signal.
The PGOOD signal represents the momentary status of the included indications without latching. If the PGOOD signal goes low due to an indicated warning or error condition, the PGOOD signal goes high immediately when the previous indicated warning or error condition is no longer present.
The BUCKn_VMON_EN bit enables the overvoltage (OV) , undervoltage (UV) and short-circuit (SC) comparators. The current limit (ILIM) comparator of each BUCK regulator is activated as soon as the corresponding BUCK regulator is enabled. In order to add the current limit indication of a BUCK regulator to the PGOOD signal, the BUCKn_VMON_EN bit of the corresponding BUCK regulator must be set. For LDO regulators, the LDOn_VMON_EN bit enables the OV and UV, short-circuit (SC) comparators. The current limit (ILIM) comparator of each LDO regulator is activated as soon as the corresponding LDO regulator is enabled. In order to add the current limit indication of an LDO to the PGOOD signal, the LDOn_VMON_EN bit of the corresponding LDO regulator must be set. When a BUCK or an LDO is not needed as a regulated output, it can be used as a voltage monitor for an external rail. For BUCK converters, if the BUCKn_VMON_EN bit remains '1' while the BUCKn_EN bit is '0', it can be used as a voltage monitor for an external rail that is connected to the FB_Bn pin of the BUCK regulator. For LDO regulators, if the LDOn_VMON_EN bit remains '1' while the LDOn_EN bit is '0', it can be used as a voltage monitor for an external rail which is connected to the VOUT_LDOn pin.
When the voltage monitor for a BUCK or LDO regulator is inactive, the output of the corresponding monitor is automatically masked to prevent it from forcing PGOOD inactive. The masking allows PGOOD to be connected to other open-drain power good signals in the system.
The VCCA input voltage monitoring is enabled with VCCA_VMON_EN bit. The monitoring can be enabled by an NVM default setting, that starts the monitoring of the VCCA voltage after the device passes the BOOT BIST state. The reference voltage for the VCCA monitor can be set by the VCCA_PG_SET bit to either 3.3 V or 5 V. The PGOOD_SEL_VCCA register bit selects whether or not the result of the VCCA monitor is included in the PGOOD monitor output signal.
An NVM option is available to gate the PGOOD output with the nRSTOUT and the nRSTOUT_SoC signals, the intended reset signals for the safety MCU and the SoC respectively. When PGOOD_SEL_NRSTOUT = '1', the PGOOD pin is gated by the nRSTOUT signal. When PGOOD_SEL_NRSTOUT_SOC = '1', the PGOOD pin is gated by the nRSTOUT_SoC signal. This option allows the PGOOD output to be used as an enable signal for external peripherals.
The outputs of the voltage monitors from all the output rails are combined, and PGOOD is active only if all the sources shows active status.
The type of output voltage monitoring for PGOOD signal is selected by PGOOD_WINDOW bit. If the bit is 0, only undervoltage is monitored; if the bit is 1, then undervoltage and overvoltage are monitored.
The polarity and the output type (push-pull or open-drain) are selected by PGOOD_POL and GPIO9_OD bits.
Figure 8-10 shows the Power-Good generation block diagram, and Figure 8-11 shows the Power-Good waveforms.
The OV and UV threshold of the voltage monitors of the BUCK regulators and the LDO regulators are updated automatically by the digital control block when the output voltage setting changes. When the output voltage of the regulator is increased, the OV threshold is updated at the same time the _VSET of the regulator is changed. The UV threshold is updated after a delay calculated by the delta voltage change and the slew rate setting. When the output voltage is decreased, the UV threshold is updated at the same time the _VSET of the regulator is changed. The OV threshold is updated after a delay calculated by the delta voltage change and the slew rate setting. The OV and UV threshold of the BUCK and LDO output voltage monitors are calculated based on the target output voltage set by the corresponding BUCKn_VSET1, BUCKn_VSET2, or LDOn_VSET registers, and the deviation from the target output voltage set (the voltage window) by the corresponding BUCKn_UV_THR, BUCKn_OV_THR, LDOn_UV_THR, and the LDOn_OV_THR registers. For the OV and UV threshold of BUCK and LDO output monitors to update with the correct timing, the following operating procedures must be followed when updating the _VSET values of the regulators to avoid detection of OV/UV fault:
The voltage monitors of unused BUCK or LDO regulators can be used for external supply rails monitoring. In three-phase configuration, the Voltage Monitor of BUCK3 (on FB_B3 pin) becomes a free available resource for monitoring an external supply voltage. In four-phase configuration, the Voltage Monitor of both BUCK3 (on FB_B3 pin) and BUCK4 (on FB_B4 pin) become free available resources for monitoring two external supply voltages.. The target output voltage is set by the corresponding BUCKn_VSET1, BUCKn_VSET2, or LDOn_VSET registers, and the deviation from the target output voltage set (the voltage window) by the corresponding BUCKn_UV_THR, BUCKn_OV_THR, LDOn_UV_THR, and the LDOn_OV_THR registers. Following aspects need to be taken into account if Voltage Monitors of unused BUCK or LDO regulators are used for monitoring external supply rails: