The TPS6593-Q1 registers are defined by the following categories:
- LDOVINT registers
- LDOVRTC registers (registers in RTC domain)
LDOVINT registersThe LDOVINT registers are powered by the internal LDOVINT, and retain their values until the
device enters the LP_STANDBY state or the BACKUP state
after the device was fully powered up and in
operation. When this occurs, LDOVINT is powered
off, all LDOVINT registers (including the VSET
registers which store the output voltage levels
for all of the external power rails) are reset. As
the device re-enters the INIT state from a wake up
signal or an On-request, the registers powered by
the LDOVINT are re-written with the default values
from NVM (Non-Volatile Memory). All registers in
the device, except the LDOVRTC registers
(registers in RTC domain), are powered by
LDOVINT.
LDOVRTC registers (registers in RTC domain)The LDOVRTC registers (registers in RTC domain) retain their values until a Power-On-Reset (POR)
occurs. POR occurs when the device loses supply
power and enters the NO SUPPLY state. When this
occurs, LDOVRTC is powered off, and all LDOVRTC
registers are reset. Following are the LDOVRTC registers:
- All RTC registers
- RTC and Crystal
Oscillator bits
- Status registers for the following events: TSD and RTC reset
- Control registers for PWRON/ENABLE, GPIO3, and GPIO4 pins (for wake signal monitor during LP_STANDBY state)
- Following interrupt registers:
- FSD_INT
- RECOV_CNT_INT
- TSD_ORD_INT
- TSD_IMM_INT
- PFSM_ERR_INT
- VCCA_OVP_INT
- ESM_MCU_RST_INT
- ESM_SOC_RST_INT
- WD_RST_INT
- WD_LONGWIN_TIMEOUT_INT
- NPWRON_LONG_INT