Each ESM has two of its own
configurable delay-timers that are reset when the device clears the respective ESM_x_START
bit. Below steps describe the procedure through which the ESM goes in case it
detects an ESM-error:
- If the respective mask bit
ESM_x_PIN_MASK=0,
the device sets interrupt bit ESM_MCU_PIN_INT or ESM_SOC_PIN_INT, and pulls the nINT pin low.
- The ESM starts the delay-1
timer (configurable through related ESM_MCU_DELAY1[7:0] or ESM_SOC_DELAY1[7:0] bits).
- If the ESM-error is no longer
present and MCU has cleared the related
interrupt bit ESM_MCU_PIN_INT or
ESM_SOC_PIN_INT before the delay-1 timer elapses, the device
releases the nINTpin, the ESM resets the delay-1 and delay-2 timers and
continues to monitor its input pin.
- If the ESM-error is still
present, or if MCU has not cleared the
related interrupt bit ESM_MCU_PIN_INT or ESM_SOC_PIN_INT, and the delay-1 timer elapses, then the ESM
clears the ENABLE_DRV bit if bit ESM_MCU_ENDRV=1 or if bit ESM_SOC_ENDRV=1.
- If the delay-2 timer
(configurable through related ESM_MCU_DELAY2[7:0] or ESM_SOC_DELAY2[7:0] bits) is set to 0,
then the ESM skips steps 6 of this list, and performs step 7.
- If the delay-2 timer is not
set to 0, then:
- ESM starts the
delay-2 timer,
- If ESM_MCU_FAIL_MASK
= 0, the device sets interrupt bit ESM_MCU_FAIL_INT and pulls the
nINT pin low and starts the delay-2 timer.
- If ESM_SOC_FAIL_MASK
= 0, the device sets interrupt bit ESM_SOC_FAIL_INT, pulls the nINT
pin low and starts the delay-2 timer.
- If the ESM-error is no longer
present and the MCU has cleared the related interrupt bits listed below
before the delay-2 timer elapses, the device releases the nINTpin, the ESM
resets the delay-1 and delay-2 timers and continues to monitor its input
pin:
- ESM_MCU_PIN_INT (and
ESM_MCU_FAIL_INT if set in step 6),
or
- ESM_SOC_PIN_INT (and
ESM_SOC_FAIL_INT if set in step 6)
- If the ESM-error is still
present, or if MCU has not cleared the
related interrupt bits ESM_MCU_PIN_INT and ESM_MCU_FAIL_INT , or ESM_SOC_PIN_INT and
ESM_SOC_FAIL_INT, and the delay-2 timer elapses, then :
- For ESM_MCU, the
device:
- clears the
ESM_MCU_START BIT
- sets
interrupt bits ESM_MCU_FAIL_INT and ESM_MCU_RST_INT, which
the device handles as an ESM_MCU_RST trigger for FSM,
described in Summary of Interrupt Signals
- After this
trigger handling completes, the device re-initializes the
ESM_MCU
- For ESM_SoC, the
device:
- clears the
ESM_SOC_START bit
- sets
interrupt bits ESM_SOC_FAIL_INT and ESM_SOC_RST_INT, which
the device handles as an ESM_SOC_RST trigger for FSM,
described in Summary of Interrupt Signals
- After this
trigger handling completes, the device re-initializes the
ESM_SoC
ESM_MCU_DELAY1[7:0] and ESM_SOC_DELAY1[7:0] set the delay-1 time-interval (tDELAY-1) for the related ESM_MCU or ESM_SoC. Use Equation 9 and Equation 10 to calculate the worst-case values for the tDELAY-1:
Equation 9. Min. tDELAY-1 = (ESM_x_DELAY1[7:0] × 2.048 ms) × 0.95
Equation 10. Max. tDELAY-1 = (ESM _x_DELAY1[7:0] × 2.048 ms) × 1.05
, in which x stands for
either MCU or
SoC.
ESM_MCU_DELAY2[7:0] or ESM_SOC_DELAY2[7:0] bits set the delay-2 time-interval (tDELAY-2) for the related ESM_MCU or ESM_SoC. Use Equation 11 and Equation 12 to calculate the worst-case values for the tDELAY-2:
Equation 11. Min. tDELAY-2 = (ESM_x_DELAY2[7:0] × 2.048 ms) × 0.95
Equation 12. Max. tDELAY-2 = (ESM_x_DELAY2[7:0] × 2.048 ms) × 1.05
, in which x stands for
either MCU or
SoC.