JAJSIA2 データシート

JAJSIA2B December 2019 – February 2022 TPS6594-Q1

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

RWE|56
- MPQF405A

サーマルパッド・メカニカル・データ

RWE|56
- QFND656

発注情報

7.8 BUCK1, BUCK2, BUCK3, BUCK4 and BUCK5 Regulators

Over operating free-air temperature range (unless otherwise noted). Voltage level are referenced to the thermal/ground pad of the device except for V_{OUT_Bn} in multiphase configurations, in which case, the voltage level is referenced to the negative FB_Bn pin of the differential pair.

POS	PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
Electrical Characteristics - Output Voltage
4.1a	V_{VOUT_Bn}	Output voltage configurable range	1-phase output	0.3		3.34	V
4.1b	V_{VOUT_Bn}	Output voltage configurable range	Multi-phase output	0.3		1.9	V
4.2a	V_{VOUT_Bn_Step}	Output voltage configurable step size	0.3 V ≤ V_{VOUT_Bn} < 0.6 V		20		mV
4.2b			0.6 V ≤ V_{VOUT_Bn}< 1.1 V		5		mV
4.2c			1.1 V ≤ V_{VOUT_Bn} < 1.66 V		10		mV
4.2d			1.66 V ≤ V_{VOUT_Bn} < 3.34 V		20		mV
4.4	V_{DROPOUT_Bn}	Input and output voltage difference	Minimum voltage between PVIN_Bn and VOUT_Bn to fulfill the electrical characteristics	0.7			V
4.5a	V_{OUT_SR_Bn}	Output voltage slew-rate configurable range⁽⁵⁾⁽⁸⁾	BUCKn_SLEW_RATE[2:0] = 000b	26.6	33.3	36.6	mV/µs
4.5b			BUCKn_SLEW_RATE[2:0] = 001b	17	20	22	mV/µs
4.5c			BUCKn_SLEW_RATE[2:0] = 010b	9	10	11	mV/µs
4.5d			BUCKn_SLEW_RATE[2:0] = 011b	4.5	5	5.5	mV/µs
4.5e			BUCKn_SLEW_RATE[2:0] = 100b	2.25	2.5	2.75	mV/µs
4.5f			BUCKn_SLEW_RATE[2:0] = 101b	1.12	1.25	1.38	mV/µs
4.5g			BUCKn_SLEW_RATE[2:0] = 110b	0.56	0.625	0.69	mV/µs
4.5h			BUCKn_SLEW_RATE[2:0] = 111b	0.281	0.3125	0.344	mV/µs
Electrical Characteristics - Output Current, Limits and Thresholds
4.7a	I_{OUT_Bn}	Output current⁽³⁾⁽⁴⁾	1-phase, BUCK5			2	A
4.7b			1-phase, BUCK4			4	A
4.7c			1-phase, BUCK1, BUCK2, BUCK3			3.5	A
4.7d			2-phase			7	A
4.7e			3-phase			10.5	A
4.7f			4-phase			14	A
4.8a	I_{OUT_MP_Bal}	Current balancing for multi-phase output	Mismatch between phase current and average phase current, 1A/phase < I_{OUT_Bn} ≤ 2A / phase			20%
4.8b	I_{OUT_MP_Bal}	Current balancing for multi-phase output	Mismatch between phase current and average phase current, I_{OUT_Bn} > 2 A / phase			10%
4.9a	I_{LIM_FWD_PEAK_ Range}	Forward current limit (peak during each switching cycle) configurable range	BUCK5	2.5		3.5	A
4.9b	I_{LIM_FWD_PEAK_ Range}		BUCK1, BUCK2, BUCK3, BUCK4	2.5		5.5	A
4.10	I_{LIM_FWD_PEAK_Step}	Forward current limit step Size			1		A
4.11a	I_{LIM_FWD_PEAK_Accuracy}	Forward current limit accuracy	I_{LIM_FWD} = 2.5 A or 3.5 A, 3.0 V ≤ V_{PVIN_Bn} ≤ 5.5 V	-0.55		0.55	A
4.11b			I_{LIM_FWD} = 4.5 A, 3.0 V ≤ V_{PVIN_Bn} ≤ 5.5 V, BUCK1, BUCK2, BUCK3, BUCK4	-0.55		0.55	A
4.11c			I_{LIM_FWD} = 5.5 A, 3.0 V ≤ V_{PVIN_Bn} ≤ 4.5 V, BUCK1, BUCK2, BUCK3, BUCK4	–15%		10%
4.11d			I_{LIM_FWD} = 5.5 A, 4.5 V ≤ V_{PVIN_Bn} ≤ 5.5 V, BUCK1, BUCK2, BUCK3, BUCK4	–10%		10%
4.12	I_{LIM_NEG}	Negative current limit (peak during each switching cycle)		1.5	2	2.8	A
4.15a	I_ADD	Phase adding level (multi-phase rails)	From 1-phase to 2-phase		2.0		A
4.15b			From 2-phase to 3-phase		4.0		A
4.15c			From 3-phase to 4-phase		6.0		A
4.16a	I_SHED	Phase shedding level (multi-phase rails)	From 2-phase to 1-phase		1.3		A
4.16b			From 3-phase to 2-phase		2.7		A
4.16c			From 4-phase to 3-phase		3.5		A
4.16d	I_{SHED_Hyst}	Phase shedding hysteresis (multi-phase rails)	Hysteresis from 2-phase to 1-phase		0.7		A
4.16e			Hysteresis from 3-phase to 2-phase		1.3		A
4.16f			Hysteresis from 4-phase to 3-phase		2.5		A
Electrical Characteristics - Current Consumption, On-Resistance, and Output Pulldown Resistance
4.17	I_off	Shutdown current, BUCKn disabled	VCCA = V_{PVIN_Bn} = 3.3 V. T_J = 25°C		1		µA
4.18a	I_{Q_AUTO}	Auto mode quiescent current	I_{OUT_Bn} = 0 mA, not switching, first single phase or primary phase in multi-phase configuration, T_J = 25°C		80		µA
4.18b			I_{OUT_Bn} = 0 mA, not switching, additional single phase or primary phase in multi-phase configuration, T_J = 25°C		60		µA
4.18c			I_{OUT_Bn} = 0 mA, not switching, secondary/tertiary/quaternary phase in multi-phase configuration, T_J = 25°C		30		µA
4.19a	R_{DS(ON) HS FET}	On-resistance, high-side FET	I_{OUT_Bn} = 1 A, BUCK5		55	110	mΩ
4.19b	R_{DS(ON) HS FET}	On-resistance, high-side FET	I_{OUT_Bn} = 1 A, BUCK1, BUCK2, BUCK3, BUCK4		52	100	mΩ
4.20a	R_{DS(ON) LS FET}	On-resistance, low-side FET	I_{OUT_Bn}= 1 A, BUCK5		41	70	mΩ
4.20b	R_{DS(ON) LS FET}	On-resistance, low-side FET	I_{OUT_Bn} = 1 A, BUCK1, BUCK2, BUCK3, BUCK4		30	55	mΩ
4.21	R_{DIS_Bn}	Output pulldown discharge resistance	Regulator disabled, per phase, BUCKn_PLDN = 1	50	100	150	Ω
4.22	R_{SW_SC}	Short circuit detection resistance threshold at the SW pin		2	4.5	20	Ω
Electrical Characteristics - 4.4 MHz V_OUT Less than 1.9 V, Multiphase or High C_OUT Single Phase
4.31	V_{PVIN_Bn}	Input voltage range		3.0	3.3	5.5	V
4.32	V_{VOUT_Bn}	Output voltage configurable range		0.3		1.9	V
4.33a	C_{IN_Bn}	Input filtering capacitance⁽¹⁾		3	22		µF
4.33b	C_{OUT-Local(Buckn)}	Output capacitance, local⁽²⁾	Per phase	10	22		µF
4.33c	C_{OUT-TOTAL_Bn}	Output capacitance, total (local and POL)⁽²⁾	Per phase	70		250	µF
4.34a	L_Bn	Power inductor	Inductance	154	220	286	nH
4.34b	L_Bn	Power inductor	DCR		10		mΩ
4.35	I_{Q_PWM}	PWM mode Quiescent current	Per phase, I_{OUT_Bn} = 0 mA		19		mA
4.160a	V_{OUT_DC_Bx}	DC output voltage accuracy, includes voltage reference, DC load and line regulations and temperature	V_{VOUT_Bx} < 1 V, PWM mode	–10		10	mV
4.160b			V_{VOUT_Bx} ≥ 1 V, PWM mode	–1%		1%
4.160c			V_{VOUT_Bx} < 1 V, PFM mode	–20		25	mV
4.160d			V_{VOUT_Bx} ≥ 1 V, PFM mode	-1% - 10 mV		1% + 15 mV
4.37a	T_{LDSR_MP}	Transient load step response⁽⁷⁾	0.3 V ≤ V_{VOUT_Bn}< 0.6 V, I_{OUT_Bn} = 1 mA to 400 mA / phase, t_r = t_f = 1 µs, PWM mode		10		mV
4.37ba			0.6 V ≤ V_{VOUT_Bn} < 1.5 V, I_{OUT_Bn} = 1 mA to 1.75A / phase, t_r = t_f = 1 µs, PWM mode, BUCK1, BUCK2, BUCK3, BUCK4		15		mV
4.37bb			0.6 V ≤ V_{VOUT_Bn} < 1.5 V, I_{OUT_Bn} = 1 mA to 1 A / phase, t_r = t_f = 1 µs, PWM mode, BUCK5		15		mV
4.37ca			1.5 V ≤ V_{VOUT_Bn} ≤ 1.9 V, I_{OUT_Bn} = 1 mA to 1.75 A / phase, t_r = t_f = 1 µs, PWM mode, BUCK1, BUCK2, BUCK3, BUCK4		1.2%
4.37cb			1.5 V ≤ V_{VOUT_Bn} ≤ 1.9 V, I_{OUT_Bn} = 1 mA to 1 A / phase, t_r = t_f = 1 µs, PWM mode, BUCK5		1.0%
4.38	T_LNSR	Transient line response	V_{PVIN_Bn} stepping from 3 V to 3.5 V, t_r = t_f = 10 µs, I_{OUT_Bn} = I_OUT(max)	-20	±5	20	mV
4.39a	V_{OUT_Ripple}	Ripple voltage⁽⁷⁾	PWM mode, 1-phase		3		mV_PP
4.39b	V_{OUT_Ripple}	Ripple voltage⁽⁷⁾	PFM mode		15	25	mV_PP
4.40	V_{TH_SC_RV(Bn)}	Threshold voltage for Short Circuit and Residual Voltage Detection	Bn_EN = 0 and BUCKn_RV_SEL = 1	140	150	160	mV
4.102	I_PWM-PFM	PWM to PFM switch current threshold⁽⁶⁾	Auto mode, V_{PVIN_Bn} = 3.3 V, V_{VOUT_Bn} = 1.0 V		400		mA
4.101	I_PFM-PWM	PFM to PWM switch current threshold⁽⁶⁾	Auto mode, V_{PVIN_Bn} = 3.3 V, V_{VOUT_Bn} = 1.0 V		500		mA
4.103	I_{PWM-PFM_HYST}	PWM to PFM switch current hysteresis	Auto mode, V_{PVIN_Bn} = 3.3 V, V_{VOUT_Bn} = 1.0 V		100		mA
Electrical Characteristics - DDR VTT Termination, 2.2 MHz Single Phase Only
4.41	V_{PVIN_Bn}	Input voltage range		2.8	3.3	5.5	V
4.42	I_{OUT_Bn_SINK}	Current sink		–1			A
4.43	V_{VOUT_Bn}	Output voltage programmable range		0.5		0.7	V
4.44a	C_{IN_Bn}	Input filtering capacitance⁽¹⁾		3	22		µF
4.44b	C_{OUT-TOTAL_Bn}	Output capacitance, local⁽²⁾		10	22		µF
4.44c	C_{OUT-TOTAL_Bn}	Output capacitance, total (local and POL)⁽²⁾		35		65	µF
4.45a	L_Bn	Power inductor	Inductance	329	470	611	nH
4.45b	L_Bn	Power inductor	DCR		10		mΩ
4.46a	I_{Q_PWM}	PWM mode Quiescent current	I_{OUT_Bn} = 0 mA		19		mA
4.161a	V_{OUT_DC_Bx}	DC output voltage accuracy, includes voltage reference, DC load and line regulations and temperature	V_{VOUT_Bx} < 1 V, PWM mode	–10		10	mV
4.161b	V_{OUT_DC_Bx}		V_{VOUT_Bx} ≥ 1 V, PWM mode	–1%		1%
4.48	T_{LDSR_MP}	Transient load step response⁽⁷⁾	0.5 V ≤ V_{VOUT_Bn}≤ 0.7 V, I_{OUT_Bn} = -1 mA to -1000 mA, t_r = t_f = 1 µs, PWM mode		15		mV
4.49	T_LNSR	Transient line response	V_{PVIN_Bn} stepping from 3 V to 3.5 V, t_r = t_f = 10 µs, I_{OUT_Bn} = I_{OUT_Bn(max)}	-20	±5	20	mV
4.50	V_{OUT_Ripple}	Ripple voltage⁽⁷⁾	PWM mode		3	6	mV_PP
Electrical Characteristics - 4.4 MHz V_OUT Less than 1.9 V, Low C_OUT, Single Phase Only
4.51	V_{PVIN_Bn}	Input voltage range		3.0	3.3	5.5	V
4.52	V_{VOUT_Bn}	Output voltage configurable range		0.3		1.9	V
4.53a	C_{IN_Bn}	Input filtering capacitance⁽¹⁾		3	22		µF
4.53b	C_{OUT-Local_Bn}	Output capacitance, local⁽²⁾		10	22		µF
4.53c	C_{OUT-TOTAL_Bn}	Output capacitance, total (local and POL)⁽²⁾		25		100	µF
4.54a	L_Bn	Power inductor	Inductance	154	220	286	nH
4.54b	L_Bn	Power inductor	DCR		10		mΩ
4.55a	I_{Q_PWM}	PWM mode Quiescent current	I_{OUT_Bn} = 0 mA, BUCK1, BUCK2, BUCK3, BUCK4		19		mA
4.55b	I_{Q_PWM}	PWM mode Quiescent current	I_{OUT_Bn}= 0 mA, BUCK5		19		mA
4.162a	V_{OUT_DC_Bx}	DC output voltage accuracy, includes voltage reference, DC load and line regulations and temperature	V_{VOUT_Bx} < 1 V, PWM mode	–10		10	mV
4.162b			V_{VOUT_Bx} ≥ 1 V, PWM mode	–1%		1%
4.162c			V_{VOUT_Bx} < 1 V, PFM mode	–20		35	mV
4.162d			V_{VOUT_Bx} ≥ 1 V, PFM mode	-1% - 10 mV		1% + 25 mV
4.57a	T_{LDSR_MP}	Transient load step response⁽⁷⁾	0.3 V ≤ V_{VOUT_Bn}< 0.6 V, I_{OUT_Bn} = 1 mA to 200 mA / phase, t_r = t_f = 1 µs, PWM mode		15		mV
4.57b			0.6 V ≤ V_{VOUT_Bn} < 1.5 V, I_{OUT_Bn} = 1 mA to 1 A / phase, t_r = t_f = 1 µs, PWM mode		15		mV
4.57c			1.5 V ≤ V_{VOUT_Bn} ≤ 1.9 V, I_{OUT_Bn} = 1 mA to 1 A / phase, t_r = t_f = 1 µs, PWM mode		1.5%
4.58	T_LNSR	Transient line response	V_{PVIN_Bn} stepping from 3 V to 3.5 V, t_r = t_f = 10 µs, I_{OUT_Bn}= I_{OUT_Bn(max)}	-20	±5	20	mV
4.59a	V_{OUT_Ripple}	Ripple voltage⁽⁷⁾	PWM mode		5	8	mV_PP
4.59b	V_{OUT_Ripple}	Ripple voltage⁽⁷⁾	PFM mode		15	50	mV_PP
4.111	I_PFM-PWM	PFM to PWM switch current threshold⁽⁶⁾	Auto mode, V_{PVIN_Bn} = 3.3 V, V_{VOUT_Bn} = 1.0 V		500		mA
4.112	I_PWM-PFM	PWM to PFM switch current threshold⁽⁶⁾	Auto mode, V_{PVIN_Bn} = 3.3 V, V_{VOUT_Bn} = 1.0 V		420		mA
4.113	I_{PWM-PFM_HYST}	PWM to PFM switch current hysteresis	Auto mode, V_{PVIN_Bn} = 3.3 V, V_{VOUT_Bn} = 1.0 V		100		mA
Electrical Characteristics - 4.4 MHz V_OUT Greater than 1.7 V, Single Phase Only
4.61	V_{PVIN_Bn}	Input voltage range		4.5	5	5.5	V
4.62	I_{OUT_Bn_4.4_HVOUT}	Output current				2.5	A
4.63	V_{VOUT_Bn}	Output voltage configurable range		1.7		3.34	V
4.64a	C_{IN_Bn}	Input filtering capacitance⁽¹⁾		3	22		µF
4.64b	C_{OUT-Local_Bn}	Output capacitance, local⁽²⁾		10	22		µF
4.64c	C_{OUT-TOTAL_Bn}	Output capacitance, total (local and POL)⁽²⁾		50		150	µF
4.65a	L_Bn	Power inductor	Inductance	329	470	611	nH
4.65b	L_Bn	Power inductor	DCR		10		mΩ
4.66a	I_{Q_PWM}	PWM mode Quiescent current	I_{OUT_Bn} = 0 mA		19		mA
4.163a	V_{OUT_DC_Bx}	DC output voltage accuracy, includes voltage reference, DC load and line regulations and temperature	V_{VOUT_Bx} < 1 V, PWM mode	–10		10	mV
4.163b			V_{VOUT_Bx} ≥ 1 V, PWM mode	–1%		1%
4.163c			V_{VOUT_Bx} < 1 V, PFM mode	–20		25	mV
4.163d			V_{VOUT_Bx} ≥ 1 V, PFM mode	-1% - 10 mV		1% + 15 mV
4.68	T_{LDSR_SP}	Transient load step response⁽⁷⁾	1.7 V ≤ V_{VOUT_Bn} ≤ 3.34 V, I_{OUT_Bn}= 1 mA to 1 A/phase, t_r = t_f = 1 µs, PWM mode		1.5%
4.69	T_LNSR	Transient line response	V_{PVIN_Bn} stepping from 4.7 V to 5.2 V, t_r = t_f = 10 µs, I_{OUT_Bn} = I_{OUT_Bn(max)}	-20	±5	20	mV
4.70a	V_{OUT_Ripple}	Ripple voltage⁽⁷⁾	PWM mode		3	7	mV_PP
4.70b	V_{OUT_Ripple}	Ripple voltage⁽⁷⁾	PFM mode		15	25	mV_PP
4.121	I_PFM-PWM	PFM to PWM switch current threshold⁽⁶⁾	Auto mode, V_{PVIN_Bn} = 5 V, V_{VOUT_Bn} = 1.8 V		400		mA
4.122	I_PWM-PFM	PWM to PFM switch current threshold⁽⁶⁾	Auto mode, V_{PVIN_Bn} = 5 V, V_{VOUT_Bn} = 1.8 V		370		mA
4.123	I_{PWM-PFM_HYST}	PWM to PFM switch current hysteresis	Auto mode, V_{PVIN_Bn} = 5 V, V_{VOUT_Bn} = 1.8 V		30		mA
Electrical Characteristics - 2.2 MHz Full V_OUT Range and V_INGreater than 4.5 V, Single Phase Only
4.71	V_{PVIN_Bn}	Input voltage range		4.5	5	5.5	V
4.72	V_{VOUT_Bn}	Output voltage configurable range		0.3		3.34	V
4.73a	C_{IN_Bn}	Input filtering capacitance⁽¹⁾		3	22		µF
4.73b	C_{OUT-Local_Bn}	Output capacitance, local⁽²⁾		10	22		µF
4.73c	C_{OUT-TOTAL_Bn}	Output capacitance, total (local and POL)⁽²⁾		100		1000	µF
4.74a	L_Bn	Power inductor	Inductance	700	1000	1300	nH
4.74b	L_Bn	Power inductor	DCR		10		mΩ
4.75	I_{Q_PWM}	PWM mode Quiescent current	I_{OUT_Bn} = 0 mA		13		mA
4.164a	V_{OUT_DC_Bx}	DC output voltage accuracy, includes voltage reference, DC load and line regulations and temperature	V_{VOUT_Bx} < 1 V, PWM mode	–10		10	mV
4.164b			V_{VOUT_Bx} ≥ 1 V, PWM mode	–1%		1%
4.164c			V_{VOUT_Bx} < 1 V, PFM mode	–20		25	mV
4.164d			V_{VOUT_Bx} ≥ 1 V, PFM mode	-1% - 10 mV		1% + 15 mV
4.77a	T_{LDSR_MP}	Transient load step response⁽⁷⁾	0.3 V ≤ V_{VOUT_Bn}< 0.6 V, I_{OUT_Bn} = 1 mA to 400 mA / phase, t_r = t_f = 1 µs, PWM mode		15		mV
4.77b			0.6 V ≤ V_{VOUT_Bn} < 1.5 V, I_{OUT_Bn} = 1 mA to 2 A / phase, t_r = t_f = 1 µs, PWM mode		15		mV
4.77c			1.5 V ≤ V_{VOUT_Bn} ≤ 3.34 V, I_{OUT_Bn} = 1 mA to 2 A / phase, t_r = t_f = 1 µs, PWM mode		1.5%
4.78	T_LNSR	Transient line response	V_{PVIN_Bn} stepping from 4.7 V to 5.2 V, t_r = t_f = 10 µs, I_{OUT_Bn}= I_{OUT_Bn(max)}	-20	±5	20	mV
4.79a	V_{OUT_Ripple}	Ripple voltage⁽⁷⁾	PWM mode		3	7.5	mV_PP
4.79b	V_{OUT_Ripple}	Ripple voltage⁽⁷⁾	PFM mode		15	25	mV_PP
4.131	I_PFM-PWM	PFM to PWM switch current threshold⁽⁶⁾	Auto mode, V_{PVIN_Bn} = 5 V, V_{VOUT_Bn} = 1.0V		310		mA
4.132	I_PWM-PFM	PWM to PFM switch current threshold⁽⁶⁾	Auto mode, V_{PVIN_Bn} = 5 V, V_{VOUT_Bn} = 1.0V		290		mA
4.133	I_{PWM-PFM_HYST}	PWM to PFM switch current hysteresis	Auto mode, V_{PVIN_Bn} = 5 V, V_{VOUT_Bn} = 1.0V		20		mA
Electrical Characteristics - 2.2 MHz V_OUT Less than 1.9 V Multiphase or Single Phase
4.81	V_{PVIN_Bn}	Input voltage range		3.0	3.3	5.5	V
4.82	V_{VOUT_Bn}	Output voltage configurable range		0.3		1.9	V
4.83a	C_{IN_Bn}	Input filtering capacitance⁽¹⁾		3	22		µF
4.83b	C_{OUT-Local_Bn}	Output capacitance, local⁽²⁾	Per phase	10	22		µF
4.83c	C_{OUT-TOTAL_Bn}	Output capacitance, total (local and POL)⁽²⁾	Per phase	100		1000	µF
4.84a	L_Bn	Power inductor	Inductance	329	470	611	nH
4.84b	L_Bn	Power inductor	DCR		10		mΩ
4.85	I_{Q_PWM}	PWM mode Quiescent current	I_{OUT_Bn} = 0 mA		13		mA
4.165a	V_{OUT_DC_Bx}	DC output voltage accuracy, includes voltage reference, DC load and line regulations and temperature	V_{VOUT_Bx} < 1 V, PWM mode	–10		10	mV
4.165b			V_{VOUT_Bx} ≥ 1 V, PWM mode	–1%		1%
4.165c			V_{VOUT_Bx} < 1 V, PFM mode	–20		25	mV
4.165d			V_{VOUT_Bx} ≥ 1 V, PFM mode	-1% - 10 mV		1% + 15 mV
4.87a	T_{LDSR_MP}	Transient load step response⁽⁷⁾	0.3 V ≤ V_{VOUT_Bn}< 0.6 V, I_{OUT_Bn} = 1 mA to 400 mA / phase, t_r = t_f = 1 µs, PWM mode		5		mV
4.87b			0.6 V ≤ V_{VOUT_Bn} < 1.5 V, I_{OUT_Bn} = 1 mA to 2 A / phase, t_r = t_f = 1 µs, PWM mode		15		mV
4.87c			1.5 V ≤ V_{VOUT_Bn} ≤ 1.9 V, I_{OUT_Bn} = 1 mA to 2 A / phase, t_r = t_f = 1 µs, PWM mode		1.0%
4.88	T_LNSR	Transient line response	V_{PVIN_Bn} stepping from 4.7 V to 5.2 V, t_r = t_f = 10 µs, I_{OUT_Bn}= I_{OUT_Bn(max)}	-20	±5	20	mV
4.89a	V_{OUT_Ripple}	Ripple voltage⁽⁷⁾	PWM mode, 1-phase		3	5	mV_PP
4.89b	V_{OUT_Ripple}	Ripple voltage⁽⁷⁾	PFM mode		15	25	mV_PP
4.141	I_PFM-PWM	PFM to PWM switch current threshold⁽⁶⁾	Auto mode, V_{PVIN_Bn} = 3.3 V, V_{VOUT_Bn} = 1.0V		500		mA
4.142	I_PWM-PFM	PWM to PFM switch current threshold⁽⁶⁾	Auto mode, V_{PVIN_Bn} = 3.3 V, V_{VOUT_Bn} = 1.0V		400		mA
4.143	I_{PWM-PFM_HYST}	PWM to PFM switch current hysteresis	Auto mode, V_{PVIN_Bn} = 3.3 V, V_{VOUT_Bn} = 1.0V		100		mA
Electrical Characteristics - 2.2 MHz Full V_OUTand Full V_IN Range, Single Phase Only
4.91	V_{PVIN_Bn}	Input voltage range		2.8	3.3	5.5	V
4.92	V_{VOUT_Bn}	Output voltage configurable range		0.3		3.34	V
4.93a	C_{IN_Bn}	Input filtering capacitance⁽¹⁾		3	22		µF
4.93b	C_{OUT-Local_Bn}	Output capacitance, local⁽²⁾		10	22		µF
4.93c	C_{OUT-TOTAL_Bn}	Output capacitance, total (local and POL)⁽²⁾		100		500	µF
4.94a	L_Bn	Power inductor	Inductance	700	1000	1300	nH
4.94b	L_Bn	Power inductor	DCR		10		mΩ
4.95	I_{Q_PWM}	PWM mode Quiescent current	I_{OUT_Bn} = 0 mA, BUCK1, BUCK2, BUCK3, BUCK4		13		mA
4.166a	V_{OUT_DC_Bx}	DC output voltage accuracy, includes voltage reference, DC load and line regulations and temperature	V_{VOUT_Bx} < 1 V, PWM mode	–10		10	mV
4.166b			V_{VOUT_Bx} ≥ 1 V, PWM mode	–1%		1%
4.166d			V_{VOUT_Bx} ≥ 1 V, PFM mode	-1% - 10 mV		1% + 15 mV
4.166c			V_{VOUT_Bx} < 1 V, PFM mode	–20		25	mV
4.97a	T_{LDSR_SP}	Transient load step response⁽⁷⁾	0.3 V ≤ V_{VOUT_Bn}< 0.6 V, I_{OUT_Bn} = 1 mA to 400 mA / phase, t_r = t_f = 1 µs, PWM mode		35		mV
4.97b			0.6 V ≤ V_{VOUT_Bn} < 1.0 V, I_{OUT_Bn} = 1 mA to 2 A / phase, t_r = t_f = 1 µs, PWM mode		17		mV
4.97c			1.0 V ≤ V_{VOUT_Bn} ≤ 3.34 V, I_{OUT_Bn} = 1 mA to 2 A / phase, t_r = t_f = 1 µs, PWM mode		3.5%
4.98	T_LNSR	Transient line response	V_{PVIN_Bn} stepping from 3 V to 3.5 V, t_r = t_f = 10 µs, I_{OUT_Bn} = I_{OUT_Bn(max)}	-20	±5	20	mV
4.99a	V_{OUT_Ripple}	Ripple voltage⁽⁷⁾	PWM mode		3	7.5	mV_PP
4.99b	V_{OUT_Ripple}	Ripple voltage⁽⁷⁾	PFM mode		15	25	mV_PP
4.151	I_PFM-PWM	PFM to PWM switch current threshold⁽⁶⁾	Auto mode, V_{PVIN_Bn} = 3.3 V, V_{VOUT_Bn} = 1.0V		290		mA
4.152	I_PWM-PFM	PWM to PFM switch current threshold⁽⁶⁾	Auto mode, V_{PVIN_Bn} = 3.3 V, V_{VOUT_Bn} = 1.0V		230		mA
4.153	I_{PWM-PFM_HYST}	PWM to PFM switch current hysteresis	Auto mode, V_{PVIN_Bn} = 3.3 V, V_{VOUT_Bn} = 1.0V		50		mA
Switching Characteristics
20.1a	f_SW	Steady state switching frequency in PWM mode (NVM configurable)	2.2 MHz setting, internal clock	2	2.2	2.4	MHz
20.1b			4.4 MHz setting, internal clock	4	4.4	4.8	MHz
20.1d			2.2 MHz setting, internal clock, spread spectrum	1.76	2.2	2.64	MHz
20.1e			4.4 MHz setting, internal clock, spread spectrum	3.5	4.4	5.3	MHz
20.1f			2.2 MHz setting, synchronized to external clock	1.76	2.2	2.64	MHz
20.1g			4.4 MHz setting, synchronized to external clock	3.5	4.4	5.3	MHz
20.2a	f_{SW_max}	Automatic maximum switching frequency scaling in PWM mode	0.6 V ≤ V_{VOUT_Bn}		4.4		MHz
20.2b	f_{SW_max}	Automatic maximum switching frequency scaling in PWM mode	0.3 V ≤ V_{VOUT_Bn} < 0.6 V		2.2		MHz
Timing Requirements
20.3	t_{settle_Bn}	Settling time after voltage scaling	From end of voltage ramp to within 15mV from target V_{OUT_DC_Bx}			105	µs
20.4	t_{startup_Bn}	Start-up delay	From enable to start of output voltage rise	100	150	218	µs
20.5a	t_{delay_OC}	Over-current detection delay	Peak current limit triggering during every switching cycle			7	µs
20.5b	t_{deglitch_OC}	Over-current detection signal deglitch time	Digital deglitch time for detected signal. Time duration to filter out short positive and negative pulses	19		23	µs
20.6	t_{latency_OC}	Over-current signal latency time from detection	Total delay from over-current detection to interrupt or PFSM trigger			30	µs

(1) Input capacitors must be placed as close as possible to the device pins.

(2) When DC voltage is applied to a ceramic capacitor, the effective capacitance is reduced due to DC bias effect. The table above therefore lists the minimum value as CAPACITANCE. In order to meet the minimum capacitance requirement, the nominal value of the capacitor may have to be scaled accordingly to take the drop of capacitance into account for a given DC voltage at the outputs of regulators.

(3) The maximum output current can be limited by the forward current limit. The maximum output current is also limited by the junction temperature and maximum average current over lifetime. The power dissipation inside the die increases the junction temperature and limits the maximum current depending on the length of the current pulse, efficiency, board and ambient temperature.

(4) Additional cooling strategies may be necessary to keep the device junction temperature at recommended limits with large output current.

(5) SLEW_RATEx[2:0] register default comes from NVM memory, and can be re-configured by the MCU. Output capacitance, forward and negative current limits and load current may limit the maximum and minimum slew rates.

(6) The final PFM-to-PWM and PWM-to-PFM switchover current varies slightly and is dependent on the output voltage, input voltage, and the inductor current level. The BUCK Regulator does not switch over from PWM to PFM for Fsw=2.2MHz and VOUT < 0.5V

(7) Please refer to the applications section of the datasheet regarding the power delivery network (PDN) used for the transient load step and output ripple test conditions. All ripple specs are defined across POL capacitor in the described PDN.

(8) The 33.3 mV/µs slew-rate setting is not recommended for L_Bx ≥ 1 µH, as this can trigger OV detection due to larger overshoot at the buck output.