SWCS032F October   2008  – July 2014 TPS65950

PRODUCTION DATA.  

  1. 1Device Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagram
  2. 2Revision History
  3. 3Terminal Configuration and Functions
    1. 3.1 Corner Balls
    2. 3.2 Ball Characteristics
    3. 3.3 Signal Description
  4. 4Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 Handling Ratings
    3. 4.3 Recommended Operating Conditions
    4. 4.4 Digital I/O Electrical Characteristics
    5. 4.5 Thermal Resistance Characteristics for ZXN Package
    6. 4.6 Minimum Voltages and Associated Currents
    7. 4.7 Timing Requirements and Switching Characteristics
      1. 4.7.1 Timing Parameters
      2. 4.7.2 Target Frequencies
      3. 4.7.3 I2C Timing
      4. 4.7.4 Audio Interface: TDM/I2S Protocol
        1. 4.7.4.1 I2S Right- and Left-Justified Data Format
        2. 4.7.4.2 TDM Data Format
      5. 4.7.5 Voice/Bluetooth PCM Interfaces
      6. 4.7.6 JTAG Interfaces
  5. 5Detailed Description
    1. 5.1  Power Module
      1. 5.1.1 Power Providers
        1. 5.1.1.1  VDD1 DC-DC Regulator
          1. 5.1.1.1.1 VDD1 DC-DC Regulator Characteristics
          2. 5.1.1.1.2 External Components and Application Schematic
        2. 5.1.1.2  VDD2 DC-DC Regulator
          1. 5.1.1.2.1 VDD2 DC-DC Regulator Characteristics
          2. 5.1.1.2.2 External Components and Application Schematic
        3. 5.1.1.3  VIO DC-DC Regulator
          1. 5.1.1.3.1 VIO DC-DC Regulator Characteristics
          2. 5.1.1.3.2 External Components and Application Schematic
        4. 5.1.1.4  VDAC LDO Regulator
        5. 5.1.1.5  VPLL1 LDO Regulator
        6. 5.1.1.6  VPLL2 LDO Regulator
        7. 5.1.1.7  VMMC1 LDO Regulator
        8. 5.1.1.8  VMMC2 LDO Regulator
        9. 5.1.1.9  VSIM LDO Regulator
        10. 5.1.1.10 VAUX1 LDO Regulator
        11. 5.1.1.11 VAUX2 LDO Regulator
        12. 5.1.1.12 VAUX3 LDO Regulator
        13. 5.1.1.13 VAUX4 LDO Regulator
        14. 5.1.1.14 Internal LDOs
        15. 5.1.1.15 CP
        16. 5.1.1.16 USB LDO Short-Circuit Protection Scheme
      2. 5.1.2 Power References
      3. 5.1.3 Power Control
        1. 5.1.3.1 Backup Battery Charger
        2. 5.1.3.2 Battery Monitoring and Threshold Detection
          1. 5.1.3.2.1 Power On/Power Off and Backup Conditions
        3. 5.1.3.3 VRRTC LDO Regulator
      4. 5.1.4 Power Consumption
      5. 5.1.5 Power Management
        1. 5.1.5.1 Boot Modes
        2. 5.1.5.2 Process Modes
          1. 5.1.5.2.1 C027.0 Mode
          2. 5.1.5.2.2 C021.M Mode
        3. 5.1.5.3 Power-On Sequence
          1. 5.1.5.3.1 Timings Before Sequence_Start
          2. 5.1.5.3.2 OMAP2 Power-On Sequence
          3. 5.1.5.3.3 OMAP3 Power-On Sequence
          4. 5.1.5.3.4 Power On in Slave_C021_Generic Mode
        4. 5.1.5.4 Power-Off Sequence
          1. 5.1.5.4.1 Power-Off Sequence in Master Modes
    2. 5.2  Real-Time Clock and Embedded Power Controller
      1. 5.2.1 RTC
        1. 5.2.1.1 Backup Battery
      2. 5.2.2 EPC
    3. 5.3  Audio/Voice Module
      1. 5.3.1 Audio/Voice Downlink (RX) Module
        1. 5.3.1.1  Earphone Output
          1. 5.3.1.1.1 Earphone Output Characteristics
          2. 5.3.1.1.2 External Components and Application Schematic
        2. 5.3.1.2  8-Ω Stereo Hands-Free
          1. 5.3.1.2.1 8-Ω Stereo Hands-Free Output Characteristics
            1. 5.3.1.2.1.1 Short-Circuit Protection
          2. 5.3.1.2.2 External Components and Application Schematic
        3. 5.3.1.3  Headset
          1. 5.3.1.3.1 Headset Output Characteristics
          2. 5.3.1.3.2 External Components and Application Schematic
        4. 5.3.1.4  Headset Pop-Noise Attenuation
        5. 5.3.1.5  Predriver for External Class-D Amplifier
          1. 5.3.1.5.1 Predriver Output Characteristics
          2. 5.3.1.5.2 External Components and Application Schematic
        6. 5.3.1.6  Vibrator H-Bridge
          1. 5.3.1.6.1 Vibrator H-Bridge Output Characteristics
          2. 5.3.1.6.2 External Components and Application Schematic
        7. 5.3.1.7  Carkit Output
        8. 5.3.1.8  Digital Audio Filter Module
        9. 5.3.1.9  Digital Voice Filter Module
          1. 5.3.1.9.1 Voice Downlink Filter (Sampling Frequency at 8 kHz)
          2. 5.3.1.9.2 Voice Downlink Filter (Sampling Frequency at 16 kHz)
        10. 5.3.1.10 Boost Stage
      2. 5.3.2 Audio/Voice Uplink (TX) Module
        1. 5.3.2.1  Microphone Bias Module
          1. 5.3.2.1.1 Analog Microphone Bias Module Characteristics
          2. 5.3.2.1.2 External Components and Application Schematic
          3. 5.3.2.1.3 Digital Microphone Bias Module Characteristics
          4. 5.3.2.1.4 Silicon Microphone Characteristics
        2. 5.3.2.2  Stereo Differential Input
        3. 5.3.2.3  Headset Differential Input
        4. 5.3.2.4  FM Radio/Auxiliary Stereo Input
          1. 5.3.2.4.1 External Components
        5. 5.3.2.5  PDM Interface for Digital Microphones
        6. 5.3.2.6  Uplink Characteristics
        7. 5.3.2.7  Microphone Amplification Stage
        8. 5.3.2.8  Carkit Input
        9. 5.3.2.9  Digital Audio Filter Module
        10. 5.3.2.10 Digital Voice Filter Module
          1. 5.3.2.10.1 Voice Uplink Filter (Sampling Frequency at 8 kHz)
          2. 5.3.2.10.2 Voice Uplink Filter (Sampling Frequency at 16 kHz)
    4. 5.4  USB HS 2.0 OTG Transceiver
      1. 5.4.1 USB Features
      2. 5.4.2 USB Transceiver
        1. 5.4.2.1 MCPC Carkit Port Timing
        2. 5.4.2.2 USB-CEA Carkit Port Timing
        3. 5.4.2.3 HS USB Port Timing
        4. 5.4.2.4 PHY Electrical Characteristics
          1. 5.4.2.4.1  5-V Tolerance
          2. 5.4.2.4.2  LS/FS Single-Ended Receivers
          3. 5.4.2.4.3  LS/FS Differential Receiver
          4. 5.4.2.4.4  LS/FS Differential Transmitter
          5. 5.4.2.4.5  HS Differential Receiver
          6. 5.4.2.4.6  HS Differential Transmitter
          7. 5.4.2.4.7  CEA/MCPC/UART Driver
          8. 5.4.2.4.8  Pullup/Pulldown Resistors
          9. 5.4.2.4.9  PHY DPLL Electrical Characteristics
          10. 5.4.2.4.10 PHY Power Consumption
        5. 5.4.2.5 OTG Electrical Characteristics
          1. 5.4.2.5.1 OTG VBUS Electrical
          2. 5.4.2.5.2 OTG ID Electrical
    5. 5.5  Battery Interface
      1. 5.5.1 General Description
        1. 5.5.1.1 Battery Charger Interface Overview
        2. 5.5.1.2 Battery Backup Overview
      2. 5.5.2 Typical Application Schematics
        1. 5.5.2.1 Functional Configurations
        2. 5.5.2.2 In-Rush Current Limitation Schematic
        3. 5.5.2.3 Configuration With BCI Not Used
      3. 5.5.3 Electrical Characteristics
        1. 5.5.3.1 Main Charge
        2. 5.5.3.2 Precharge
        3. 5.5.3.3 Constant Voltage Mode
      4. 5.5.4 Charge Sequence Timing Diagram
      5. 5.5.5 CEA Charger Type
    6. 5.6  MADC
      1. 5.6.1 General Description
      2. 5.6.2 Main Electrical Characteristics
      3. 5.6.3 Channel Voltage Input Range
        1. 5.6.3.1 Sequence Conversion Time (Real-Time or Nonaborted Asynchronous)
    7. 5.7  LED Drivers
      1. 5.7.1 General Description
    8. 5.8  Keyboard
      1. 5.8.1 Keyboard Connection
    9. 5.9  Clock Specifications
      1. 5.9.1 Features
      2. 5.9.2 Input Clock Specifications
        1. 5.9.2.1 Clock Source Requirements
        2. 5.9.2.2 High-Frequency Input Clock
        3. 5.9.2.3 32-kHz Input Clock
          1. 5.9.2.3.1 External Crystal Description
          2. 5.9.2.3.2 External Clock Description
      3. 5.9.3 Output Clock Specifications
        1. 5.9.3.1 32KCLKOUT Output Clock
        2. 5.9.3.2 HFCLKOUT Output Clock
        3. 5.9.3.3 Output Clock Stabilization Time
    10. 5.10 Debouncing Time
    11. 5.11 External Components
  6. 6Device and Documentation Support
    1. 6.1 Device Support
      1. 6.1.1 Development Support
      2. 6.1.2 Device Nomenclature
    2. 6.2 Documentation Support
    3. 6.3 Community Resources
    4. 6.4 Trademarks
    5. 6.5 Electrostatic Discharge Caution
    6. 6.6 Export Control Notice
    7. 6.7 Glossary
    8. 6.8 Additional Acronyms

パッケージ・オプション

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メカニカル・データ（パッケージ｜ピン）
  • ZXN|209
サーマルパッド・メカニカル・データ
発注情報

2 Revision History

Changes from E Revision (January 2011) to F Revision