The TPS65983B is a fully-integrated USB Power Delivery (USB-PD) management device providing cable-plug and orientation detection for a USB Type-C and PD plug or receptacle. The TPS65983B communicates with the cable and another USB Type-C and PD device at the opposite end of the cable, enables integrated port-power switches, controls an external high-current port-power switch, and multiplexes high-speed data to the port for USB2.0 and supported Alternate Mode sideband information. The TPS65983B also controls an attached super-speed multiplexer to simultaneously support USB3.0/3.1 data rates and DisplayPort video.

The TPS65983B is divided into six main sections: the USB-PD controller, the cable-plug and orientation detection circuitry, the port-power switches, the port-data multiplexer, the power-management circuitry, and the digital core.

The USB-PD controller provides the physical layer (PHY) functionality of the USB-PD protocol. The USB-PD data is output through either the C_CC1 pin or the C_CC2 pin, depending on the orientation of the reversible USB Type-C cable. For a high-level block diagram of the USB-PD physical layer, a description of features, and more detailed circuitry, refer to the USB-PD Physical Layer section.

The analog circuitry for cable-plug and orientation detection automatically detects a USB Type-C cable-plug insertion and also automatically detects the cable orientation. For a high-level block diagram of cable plug and orientation detection, a description of features, and more detailed circuitry, refer to the Cable Plug and Orientation Detection section.

The port-power switches provide power to the system port through the VBUS pin and also through the C_CC1 or C_CC2 pins based on the detected plug orientation. For a high-level block diagram of the port-power switches, a description of features, and more detailed circuitry, refer to the Port Power Switches section.

The port-data multiplexer connects various input pairs to the system port through the C_USB_TP, C_USB_TN, C_USB_BP, C_USB_BN, C_SBU1 and C_SBU2 pins. For a high-level block diagram of the port-data multiplexer, a description of features, and more detailed circuitry, refer to the USB Type-C Port Data Multiplexer section.

The power-management circuitry receives and provides power to the TPS65983B internal circuitry and to the VOUT_3V3 and LDO_3V3 outputs. For a high-level block diagram of the power-management circuitry, a description of features and, more detailed circuitry, refer to the Power Management section.

The digital core provides the engine for receiving, processing, and sending all USB-PD packets as well as handling control of all other TPS65983B functionality. A small portion of the digital core contains non-volatile memory, called boot code, which is capable of initializing the TPS65983B and loading a larger, configurable portion of application code into volatile memory in the digital core. For a high-level block diagram of the digital core, a description of features and, more detailed circuitry, refer to the Digital Core section.

The digital core of the TPS65983B also interprets and uses information provided by the analog-to-digital converter ADC (see the ADC section), is configurable to read the status of general purpose inputs and trigger events accordingly, and controls general outputs which are configurable as push-pull or open-drain types with integrated pullup or pulldown resistors and can operate tied to a 1.8 V or 3.3-V rail. The TPS65983B is an I²C slave to be controlled by a host processor (see the I²C Slave Interface section), a SPI controller to write to and read from an external flash memory (see the SPI Controller Interface section), and is programmed by a single-wire debugger (SWD) connection (see the Single-Wire Debugger Interface section).

The TPS65983B also integrates a thermal shutdown mechanism (see Thermal Shutdown section) and runs off of accurate clocks provided by the integrated oscillators (see the Oscillators section).