SLVSBM4C September   2012  – January 2016 TPS717-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Shutdown
      3. 7.3.3 Startup and Noise Reduction Capacitor
      4. 7.3.4 Undervoltage Lockout (UVLO)
      5. 7.3.5 Minimum Load
      6. 7.3.6 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Transient Response
      2. 8.1.2 Input and Output Capacitor Requirements
      3. 8.1.3 Dropout Voltage
      4. 8.1.4 Power Dissipation
      5. 8.1.5 Output Noise
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Design Considerations
        2. 8.2.2.2 Powering a PLL Integrated on an SOC
        3. 8.2.2.3 Design Considerations
      3. 8.2.3 Application Curve
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Module
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

4 Revision History

Changes from B Revision (December 2014) to C Revision

  • Moved AEC-Q100 qualification bullet to first in Features listGo
  • Added TI Design Go
  • Changed TPS717xx-Q1 to TPS717-Q1 throughout document Go
  • Added footnote and CIN, R2, and CNR parameters to Recommended Operating Conditions table Go
  • Changed VFB parameter in Electrical Characteristics table Go
  • Changed ΔVOUT(ΔIOUT) parameter typical specification in Electrical Characteristics table Go
  • Changed units of Vn parameter in Electrical Characteristics tableGo
  • Deleted UVLO parameter minimum specification from Electrical Characteristics tableGo
  • Changed TA to TJ in x-axis of Figure 7, Figure 10, and Figure 11Go
  • Changed 40 mV/div to 40 mA/div in y-axis of Figure 28 Go
  • Added last two sentences to Undervoltage Lockout (UVLO) section Go
  • Changed last bulleted condition in Normal Operation section Go
  • Changed TJ specification in Normal mode row of Table 1 Go
  • Added last sentence to Input and Output Capacitor Requirements sectionGo
  • Clarified discussion of R2 in second paragraph of Design Considerations section Go
  • Changed first and third paragraphs of Do's and Don'ts section Go

Changes from A Revision (August 2013) to B Revision

  • Changed format to meet latest data sheet standardsGo
  • Changed Features list on front page: added, deleted, and reordered several bullets Go
  • Added ESD Ratings table and Feature Description, Device Functional Modes, Application and Implementation, Power Supply Recommendations, Layout, Device and Documentation Support, and Mechanical, Packaging, and Orderable Information sectionsGo
  • Added several Applications list bullets on front page Go
  • Deleted pinout drawings from front page Go
  • Changed pin descriptions throughout Pin Functions tableGo
  • Added parametric measurement for ISHDN for DRV package Go
  • Changed Figure 1, Figure 2, Figure 3, and Figure 4: removed legend, added call-outs for clarityGo
  • Changed title of Figure 15 and Figure 17Go
  • Changed Overview section Go
  • Corrected input and output symbols in operational amplifiers in Functional Block Diagrams Go
  • Changed Undervoltage Lockout (UVLO) section text: reworded for clarityGo
  • Deleted Reverse Current Protection section Go
  • Changed Equation 4 Go

Changes from * Revision (September 2012) to A Revision

  • Changed front page to two-column format.Go
  • Added part number TPS71745-Q1.Go
  • Changed C3B to C4B in Features listGo
  • Removed Ordering Information tableGo
  • Added Junction Temperature to Absolute Maximum Ratings tableGo
  • Changed C3B to C4B in Absolute Maximum Ratings table.Go
  • Changed Application Information section to one-column format.Go