SBVS068I February   2006  – January 2016 TPS717

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Shutdown
      3. 7.3.3 Startup and Noise Reduction Capacitor
      4. 7.3.4 Undervoltage Lockout (UVLO)
      5. 7.3.5 Minimum Load
      6. 7.3.6 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Transient Response
      2. 8.1.2 Input and Output Capacitor Requirements
      3. 8.1.3 Dropout Voltage
      4. 8.1.4 Output Noise
    2. 8.2 Typical Applications
      1. 8.2.1 Application for Fixed Voltage Versions and Adjustable Voltage Version
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Powering a PLL Integrated on an SOC
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
    2. 10.2 Layout Examples
    3. 10.3 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Module
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

DCK Package
5-Pin SC70
Top View
TPS717 po_dck_slvsbm4.gif
DRV Package
2-mm × 2-mm, 6-Pin WSON
Top View
TPS717 po_drv_slvsbm4.gif
DSE Package
1.5-mm × 1.5-mm, 6-Pin WSON
Top View
TPS717 po_dse_slvsbm4.gif
1. N/C = No connection

Pin Functions

PIN I/O DESCRIPTION
NAME DCK
(SC70)		 DRV
(WSON)		 DSE
(WSON)
EN 3 4 4 I Driving the enable pin (EN) above VEN(high) turns on the regulator. Driving this pin below VEN(low) puts the regulator into standby mode, thereby disabling the output and reducing operating current.
FB 4 2 3 I Adjustable voltage version only. The voltage at this pin is fed to the error amplifier. A resistor divider from OUT to FB sets the output voltage when in regulation.
GND 2 3 2 — Ground
IN 1 6 6 I Input to the device. A 0.1-μF to 1-μF capacitor is recommended for better performance.
N/C — 5 5 — Not connected. This pin can be tied to ground to improve thermal dissipation.
NR 4 2 3 — Fixed voltage versions only. The noise reduction capacitor filters the noise generated by the internal band gap, thus lowering output noise.
OUT 5 1 1 O This pin is the regulated output voltage. A minimum capacitance of 1 μF is required for stability from this pin to ground.