SLVSAJ4C September   2010  – October 2017

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Pin Configuration and Functions
  6. 6Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Power Dissipation Ratings
    4. 6.4 Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. 7Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable
      2. 7.3.2 Capacitor Selection for Stability
      3. 7.3.3 Output Noise
      4. 7.3.4 Power-Supply Rejection
      5. 7.3.5 Current Limit
      6. 7.3.6 Thermal Protection
      7. 7.3.7 Adjustable Voltage Applications
  8. 8Device and Documentation Support
    1. 8.1 Related Links
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Community Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  9. 9Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

DBV Package
5-Pin SOT-23
Top View
TPS72325-Q1 TPS72301-Q1 po_lvsaj4.gif

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 GND — Ground
2 IN I Input supply
3 EN I Bipolar enable pin. Driving this pin above the positive enable threshold or below the negative enable threshold turns on the regulator. Driving this pin below the positive disable threshold and above the negative disable threshold puts the regulator into shutdown mode.
4 NR — Fixed-voltage versions only. Connecting an external capacitor between this pin and ground bypasses noise generated by the internal band gap. This configuration allows output noise to be reduced to very low levels.
5 OUT O Regulated output voltage. The device requires the connection of a small 2.2-μF ceramic capacitor from this pin to GND to ensure stability.