SLVSAI3A September   2010  – May 2016

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Transient Response
      3. 7.3.3 Reverse Current
      4. 7.3.4 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable Pin and Shutdown
      2. 7.4.2 Dropout Voltage
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Application Circuit for Fixed-Voltage Versions
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Input And Output Capacitor Requirements
          2. 8.2.1.2.2 Output Noise
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical Application Circuit for Adjustable-Voltage Version
        1. 8.2.2.1 Design Requirements
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
    4. 10.4 Power Dissipation
  11. 11Device And Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, And Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

see (1)
MIN MAX UNIT
VIN –0.3 6 V
VEN –0.3 6 V
VOUT –0.3 5.5 V
VNR, VFB –0.3 6 V
Peak output current Internally limited
Output short-circuit duration Indefinite
Junction temperature, TJ –40 150 °C
Operating ambient temperature, TA –40 125 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 V
Charged-device model (CDM), per AEC Q100-011 ±500
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VI Unregulated input voltage 1.7 5.5 V
VO Output voltage 0 5.5 V
IOUT Output current 0 500 mA

6.4 Thermal Information

THERMAL METRIC(1) TPS73601-Q1, TPS73625-Q1, TPS73633-Q1 UNIT
DBV (SOT-23)
5 PINS
RθJA Junction-to-ambient thermal resistance 221.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 74.9 °C/W
RθJB Junction-to-board thermal resistance 51.9 °C/W
ψJT Junction-to-top characterization parameter 2.8 °C/W
ψJB Junction-to-board characterization parameter 51.1 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

Over operating temperature range (TA = –40°C to 125°C), VIN = VOUT(nom) + 0.5 V(1), IOUT = 10 mA, VEN = 1.7 V, and COUT = 0.1 μF, unless otherwise noted. Typical values are at TJ = 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage(1)(2) 1.7 5.5 V
VFB Internal reference (TPS73601) TJ = 25°C 1.198 1.2 1.21 V
VOUT Output voltage (TPS73601)(3) VFB 5.5 – VDO V
Accuracy(1)(4) Nominal TJ = 25°C –0.5% 0.5%
over VIN, IOUT, and T VOUT + 0.5 V ≤ VIN ≤ 5.5 V;
10 mA ≤ IOUT ≤ 400 mA
–1% ±0.5% 1%
ΔVOUT%/ΔVIN Line regulation(1) VO(nom) + 0.5 V ≤ VIN ≤ 5.5 V 0.01 %/V
ΔVOUT%/ΔIOUT Load regulation 1 mA ≤ IOUT ≤ 400 mA 0.002 %/mA
10 mA ≤ IOUT ≤ 400 mA 0.0005
VDO Dropout voltage(5)
(VIN = VOUT(nom) – 0.1 V)
IOUT = 400 mA 75 200 mV
ZO(DO) Output impedance in dropout 1.7 V ≤ VIN ≤ VOUT + VDO 0.25 Ω
ICL Output current limit VOUT = 0.9 × VOUT(nom) 400 650 800 mA
3.6 V ≤ VIN ≤ 4.2 V, 0°C ≤ TJ ≤ 70°C 500 800 mA
ISC Short-circuit current VOUT = 0 V 450 mA
IREV Reverse leakage current(6) (–IIN) VEN ≤ 0.5 V, 0 V ≤ VIN ≤ VOUT 0.1 10 μA
IGND GND pin current IOUT = 10 mA (IQ) 400 550 μA
IOUT = 400 mA 800 1000
ISHDN Shutdown current (IGND) VEN ≤ 0.5 V, VOUT ≤ VIN ≤ 5.5,
–40°C ≤ TJ ≤ 100°C
0.02 1.3 μA
IFB FB pin current (TPS73601) 0.1 0.45 μA
PSRR Power-supply rejection ratio (ripple rejection) f = 100 Hz, IOUT = 400 mA 58 dB
f = 10 KHz, IOUT = 400 mA 37
VN Output noise voltage
BW = 10 Hz – 100 KHz
COUT = 10 μF, No CNR 27 × VOUT μVRMS
COUT = 10 μF, CNR = 0.01 μF 8.5 × VOUT
tSTR Start-up time VOUT = 3 V, RL = 30 Ω COUT = 1 μF, CNR = 0.01 μF 600 μs
VEN(HI) EN pin high (enabled) 1.7 VIN V
VEN(LO) EN pin low (shutdown) 0 0.5 V
IEN(HI) EN pin current (enabled) VEN = 5.5 V 0.02 0.1 μA
TSD Thermal shutdown temperature Shutdown, temperature increasing 160 °C
Reset, temperature decreasing 140
(1) Minimum VIN = VOUT + VDO or 1.7 V, whichever is greater.
(2) For VOUT(nom) < 1.6 V, when VIN ≤ 1.6 V, the output locks to VIN and may result in a damaging over-voltage level on the output. To avoid this situation, disable the device before powering down the VIN.
(3) TPS73601 is tested at VOUT = 2.5 V.
(4) Tolerance of external resistors not included in this specification.
(5) VDO is not measured for fixed output versions with VOUT(nom) < 1.8 V.
(6) Fixed-voltage versions only; see Application and Implementation for more information.

6.6 Typical Characteristics

For all voltage versions, at TJ = 25°C, VIN = VOUT(nom) + 0.5 V, IOUT = 10 mA, VEN = 1.7 V, and COUT = 0.1 μF, unless otherwise noted.
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_load_reg-bvs038.gif Figure 1. Load Regulation
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_vdo_iout-bvs038.gif Figure 3. Dropout Voltage vs Output Current
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_acc_histo-bvs038.gif Figure 5. Output Voltage Accuracy Histogram
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_ignd_iout-bvs038.gif Figure 7. Ground Pin Current vs Output Current
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_shut_temp-bvs038.gif Figure 9. Ground Pin Current in Shutdown vs Temperature
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_lim_vin-bvs038.gif Figure 11. Current Limit vs VIN
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 psrr_v_f_bvs037.gif Figure 13. PSRR (Ripple Rejection) vs Frequency
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_nsd_fre1-bvs038.gif Figure 15. Noise Spectral Density CNR = 0 μF
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_rms_cout-bvs038.gif Figure 17. RMS Noise Voltage vs COUT
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_load_633-bvs038.gif Figure 19. TPS73633 Load Transient Response
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_on_633-bvs038.gif Figure 21. TPS73633 Turnon Response
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_updown633-bvs038.gif
Figure 23. TPS73633 Power Up and Power Down
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_rms_601-bvs038.gif Figure 25. TPS73601 RMS Noise Voltage vs CFB
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_load_601-bvs038.gif Figure 27. TPS73601 Load Transient, Adjustable Version
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_line_reg-bvs038.gif Figure 2. Line Regulation
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_vdo_temp-bvs038.gif Figure 4. Dropout Voltage vs Temperature
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_dri_histo-bvs038.gif Figure 6. Output Voltage Drift Histogram
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_ignd_temp-bvs038.gif Figure 8. Ground Pin Current vs Temperature
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_lim_vout-bvs038.gif Figure 10. Current Limit vs VOUT (Foldback)
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_lim_temp-bvs038.gif Figure 12. Current Limit vs Temperature
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_psrr_vin-bvs038.gif Figure 14. PSRR (Ripple Rejection) vs VIN – VOUT
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_nsd_fre2-bvs038.gif Figure 16. Noise Spectral Density CNR = 0.01 μF
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_rms_cnr-bvs038.gif Figure 18. RMS Noise Voltage vs CNR
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_line_633-bvs038.gif Figure 20. TPS73633 Line Transient Response
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_off_633-bvs038.gif Figure 22. TPS73633 Turnoff Response
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_enable_tm-bvs038.gif Figure 24. IENABLE vs Temperature
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_ifb_601-bvs038.gif Figure 26. TPS73601 IFB vs Temperature
TPS73601-Q1 TPS73625-Q1 TPS73633-Q1 tc_line_601-bvs038.gif Figure 28. TPS73601 Line Transient, Adjustable Version