JAJSEP4C
June 2018 – May 2022
TPS746-Q1
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagrams
7.3
Feature Description
7.3.1
Undervoltage Lockout (UVLO)
7.3.2
Shutdown
7.3.3
Foldback Current Limit
7.3.4
Thermal Shutdown
7.4
Device Functional Modes
7.4.1
Device Functional Mode Comparison
7.4.2
Normal Operation
7.4.3
Dropout Operation
7.4.4
Disabled
8
Application and Implementation
8.1
Application Information
8.1.1
Adjustable Device Feedback Resistors
8.1.2
Input and Output Capacitor Selection
8.1.3
Dropout Voltage
8.1.4
Exiting Dropout
8.1.5
Reverse Current
8.1.6
Power Dissipation (PD)
8.1.7
Power-Good Function
8.1.8
Feed-Forward Capacitor (CFF)
8.1.9
Start-Up Sequencing
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Input Current
8.2.2.2
Thermal Dissipation
8.2.3
Application Curve
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Examples
11
Device and Documentation Support
11.1
Device Support
11.1.1
Device Nomenclature
11.2
Documentation Support
11.2.1
Related Documentation
11.3
Receiving Notification of Documentation Updates
11.4
サポート・リソース
11.5
Trademarks
11.6
Electrostatic Discharge Caution
11.7
Glossary
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DRB|8
MPDS118K
DRV|6
MPDS216E
サーマルパッド・メカニカル・データ
DRB|8
QFND619
DRV|6
QFND651
発注情報
jajsep4c_oa
jajsep4c_pm
11.2.1
Related Documentation
For related documentation see the following:
Texas Instruments,
Pros and Cons of Using a Feedforward Capacitor with a Low-Dropout Regulator
application report
Texas Instruments,
An Empirical Analysis of the Impact of Board Layout on LDO Thermal Performance
application report