JAJSQI0G march   2008  – june 2023 TPS799-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Shutdown
      3. 7.3.3 Dropout Voltage
      4. 7.3.4 Start-Up
      5. 7.3.5 Undervoltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input and Output Capacitor Requirements
        2. 8.2.2.2 Feedback Capacitor Requirements (TPS79901-Q1 Only)
        3. 8.2.2.3 Output Noise
        4. 8.2.2.4 Transient Response
        5. 8.2.2.5 Minimum Load
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
        2. 8.4.1.2 Thermal Consideration
        3. 8.4.1.3 Power Dissipation
        4. 8.4.1.4 Package Mounting
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.2.2.3 Output Noise

In most LDOs, the band gap is the dominant noise source. If a noise-reduction capacitor (CNR) is used with the TPS799-Q1, the band gap does not contribute significantly to noise. Instead, noise is dominated by the output resistor divider and the error amplifier input. To minimize noise in a given application, use a 0.01-μF noise reduction capacitor; for the adjustable version, smaller value resistors in the output resistor divider reduce noise. A parallel combination that gives 2 μA of divider current has the same noise performance as a fixed-voltage version. To further optimize noise, equivalent series resistance of the output capacitor can be set to approximately 0.2 Ω. This configuration maximizes phase margin in the control loop, reducing total output noise by up to 10%.

Noise can be referred to the feedback point (FB pin) such that with CNR = 0.01 μF, total noise is approximately given by Equation 1:

Equation 1. GUID-F610131F-D99D-4C43-945F-F3D6E12DEBAC-low.gif

The adjustable version of the TPS79901-Q1 device does not have the noise-reduction pin available, so ultra-low noise operation is not possible. Noise can be minimized according to the previous recommendations.