JAJSEY6B March 2018 – October 2018 TPS7A10
PRODUCTION DATA.
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The device contains a thermal shutdown protection circuit to disable the device when the thermal junction temperature (TJ) of the main pass-FET rises to the thermal shutdown temperature (TSD ) for shutdown listed in the Electrical Characteristics. Thermal shutdown hysteresis makes sure that the LDO resets again (turns on) when the temperature falls to the TSD for reset.
The thermal time constant of the semiconductor die is fairly short, and thus the device may cycle on and off when thermal shutdown is reached until the power dissipation is reduced.
For reliable operation, limit the junction temperature to a maximum of 125°C. Operation above 125°C causes the device to exceed the operational specifications. Although the internal protection circuitry of the device is designed to protect against thermal overload conditions, this circuitry is not intended to replace proper heat sinking. Continuously running the device into thermal shutdown or above a junction temperature of 125°C reduces long-term reliability.
A fast start up when TJ > the TSD for reset causes the device thermal shutdown to assert at TSD for reset, and prevents the device from turning on until the junction temperature is reduced below TSD for reset.