JAJST03A August 2024 – September 2024 TPS7A20U
PRODUCTION DATA
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For this design example, the 4.1V output version (TPS7A20U41) is selected. A nominal 5V input supply is assumed. Use a minimum 1.0μF input capacitor to minimize the effect of resistance and inductance between the 5V source and the LDO input. Also use a minimum 1.0μF output capacitor for stability and good load transient response. The dropout voltage (VDO) is less than 95mV maximum at a 4.1V output voltage and 75mA output current. Thus, there are no dropout issues with a minimum 4.5V input voltage and a maximum 75mA output current.