JAJSMT7 November   2021 TPS7A44

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 MID_OUT Voltage Selection
      2. 7.3.2 Precision Enable
      3. 7.3.3 Dropout Voltage
      4. 7.3.4 Current Limit
      5. 7.3.5 Thermal Shutdown
      6. 7.3.6 Power Good
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Functional Mode Comparison
      2. 7.4.2 Normal Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 MID_OUT Voltage Setting
      2. 8.1.2 Adjustable Device Feedback Resistors
      3. 8.1.3 Recommended Capacitor Types
      4. 8.1.4 Input and Output Capacitor Requirements
      5. 8.1.5 Power Dissipation (PD)
      6. 8.1.6 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Modules
        2. 11.1.1.2 Spice Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.6 Power Good

The power-good (PG) pin is an open-drain output and can be connected to a regulated supply through an external pullup resistor. The maximum pullup voltage is listed as VPG in the Section 6.3 table. For the PG pin to have a valid output, the voltage on the IN pin must be greater than 4 V. When VOUT exceeds VIT(PG,RISING), the PG output is high impedance and the PG pin voltage pulls up to the connected regulated supply. When the regulated output falls below VIT(PG,FALLING), the open-drain output turns on and pulls the PG output low after a short deglitch time. If output voltage monitoring is not needed, the PG pin can be left floating or connected to ground.

The recommended maximum PG pin sink current (IPG-SINK) and the leakage current into the PG pin (ILKG(PG)) are listed in the Section 6.5 table.

The PG pullup voltage (VPG_PULLUP), the desired minimum power-good output voltage (VPG(MIN)), and ILKG(PG) limit the maximum PG pin pullup resistor value (RPG_PULLUP). VPG_PULLUP, the PG pin low-level output voltage (VOL(PG)), and IPG-SINK limit the minimum RPG_PULLUP. Maximum and minimum values for RPG_PULLUP can be calculated from the following equations:

Equation 2. RPG_PULLUP(MAX) = (VPG_PULLUP – VPG(MIN)) / ILKG(PG)_MAX
Equation 3. RPG_PULLUP(MIN) = (VPG_PULLUP – VOL(PG)) / IPG-SINK

For example, if the PG pin is connected to a pullup resistor with a 3.3-V external supply, from the Section 6.5 table, RPG_PULLUP(MAX) is 25 MΩ. From the Section 6.5 table, RPG_PULLUP(MIN) is 6.6 kΩ.