JAJSRK1G March   2012  – November 2023 TPS7A7100

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configurations
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 User-Configurable Output Voltage
      2. 6.3.2 Traditional Adjustable Configuration
      3. 6.3.3 Undervoltage Lockout (UVLO)
      4. 6.3.4 Soft-Start
      5. 6.3.5 Current Limit
      6. 6.3.6 Enable
      7. 6.3.7 Power-Good
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 ANY-OUT Programmable Output Voltage
        2. 7.2.2.2 Traditional Adjustable Output Voltage
        3. 7.2.2.3 Input Capacitor Requirements
        4. 7.2.2.4 Output Capacitor Requirements
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Thermal Considerations
        2. 7.4.1.2 Power Dissipation
        3. 7.4.1.3 Estimating Junction Temperature
      2. 7.4.2 Layout Example
  9. 8 Device And Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, And Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

4 Pin Configurations

GUID-E4161CDF-5A69-465B-B5DC-5E73A5A520B6-low.gifFigure 4-1 RGT Package,16-Pin VQFN(Top View)
GUID-817BE2E9-A3F5-47AD-8228-F74A689F93A7-low.gifFigure 4-2 RGW Package,20-Pin VQFN With Exposed Thermal Pad(Top View)
Table 4-1 Pin Functions
PIN I/O DESCRIPTION
NAME RGW RGT
50mV, 100mV, 200mV, 400mV, 800mV, 1.6V 5, 6, 7,
9, 10, 11		 4, 5, 6,
8, 9, 10		 I Output voltage setting pins. These pins must be connected to ground or left floating. Connecting these pins to ground increases the output voltage by the value of the pin name; multiple pins can be simultaneously connected to GND to select the desired output voltage. Leave these pins floating (open) when not in use. See the User-Configurable Output Voltage section for more details.
EN 14 12 I Enable pin. Driving this pin to logic high enables the device; driving the pin to logic low disables the device. See the Enable section for more details.
FB 3 2 I Output voltage feedback pin. Connected to the error amplifier. See the User-Configurable Output Voltage and Traditional Adjustable Configuration sections for more details. Connect a 220-pF ceramic capacitor from the FB pin to OUT.
GND 8, 18 7 — Ground pin.
IN 15, 16, 17 13, 14 I Unregulated supply voltage pin. Connect an input capacitor to this pin. See the Input Capacitor Requirements section for more details.
NC 12 — — Not internally connected. The NC pin is not connected to any electrical node. This pin and the thermal pad must be connected to a large-area ground plane. See the Power Dissipation section for more details.
OUT 1, 19, 20 15, 16 O Regulated output pin. A 4.7-μF or larger capacitance is required for stability. See the Output Capacitor Requirements section for more details.
PG 4 3 O Active-high power good pin. An open-drain output that indicates when the output voltage reaches 90% of the target. See the Power-Good section for more details.
SNS 2 1 I Output voltage sense input pin. See the User-Configurable Output Voltage and Traditional Adjustable Configuration sections for more details.
SS 13 11 — Soft-start pin. Leaving this pin open provides a soft start of the default setting.
Connecting an external capacitor between this pin and ground enables the soft-start function by forming an RC-delay circuit in combination with the integrated resistance on the silicon. See the Soft-Start section for more details.
Thermal Pad — The thermal pad must be connected to a large-area ground plane. If available, connect an electrically-floating, dedicated thermal plane to the thermal pad as well.