The TPS7A8300 is a low-noise (6 µVRMS), low-dropout voltage regulator (LDO) capable of sourcing a 2-A load with only 125 mV of maximum dropout.
The TPS7A8300 output voltages are fully user-adjustable (up to 3.95 V) using a printed circuit board (PCB) layout without the need of external resistors, thus reducing overall component count. For higher output voltage applications, the device achieves output voltages up to 5 V with the use of external resistors. The device supports very low input voltages (down to 1.1 V) with the use of an additional BIAS rail.
With very high accuracy (1% over line, load, and temperature), remote sensing, and soft-start capabilities to reduce inrush current, the TPS7A8300 is ideal for powering high-current, low-voltage devices such as high-end microprocessors and field-programmable gate arrays (FPGAs).
The TPS7A8300 is designed to power-up noise-sensitive components in high-speed communication applications. The very low-noise, 6-µVRMS device output and high broad-bandwidth PSRR (40 dB at
1 MHz) minimizes phase noise and clock jitter in high-frequency signals. These features maximize performance of clocking devices, analog-to-digital converters (ADCs), and digital-to-analog converters (DACs).
For applications where positive and negative low-noise rails are required, consider TI's TPS7A33 family of negative high-voltage, ultralow-noise linear regulators.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TPS7A8300 | VQFN (20) | 5.00 mm × 5.00 mm |
VQFN (20) | 3.50 mm × 3.50 mm |
Changes from E Revision (August 2014) to F Revision
Changes from D Revision (February 2013) to E Revision
Changes from C Revision (July 2013) to D Revision
Changes from B Revision (July 2013) to C Revision
Changes from A Revision (June 2013) to B Revision
Changes from * Revision (May 2013) to A Revision
PIN | DESCRIPTION | ||
---|---|---|---|
NAME | NO. | I/O | |
50mV, 100mV, 200mV, 400mV, 800mV, 1.6V | 5, 6, 7, 9, 10, 11 | I | Output voltage setting pins. Connect these pins to ground or leave floating. Connecting these pins to ground increases the output voltage by the value of the pin name; multiple pins can be simultaneously connected to GND to select the desired output voltage. Leave these pins floating (open) when not in use. See the ANY-OUT Programmable Output Voltage section for more details. |
BIAS | 12 | I | BIAS supply voltage pin for the use of 1.1 V ≤ VIN ≤ 1.4 V and to connect a 10-µF capacitor between this pin and ground. |
EN | 14 | I | Enable pin. Driving this pin to logic high enables the device; driving this pin to logic low disables the device. See the Start-Up section for more details. |
FB | 3 | I | Output voltage feedback pin connected to the error amplifier. Although not required, a 10-nF feed-forward capacitor from FB to OUT (as close to the device as possible) is recommended for low-noise applications to maximize ac performance. The use of a feed-forward capacitor may disrupt PG (power good) functionality. See the ANY-OUT Programmable Output Voltage and Adjustable Operation sections for more details. |
GND | 8, 18 | — | Ground pin. These pins must be externally shorted for the RGR package option. |
IN | 15-17 | I | Input supply voltage pin. A 10-μF input ceramic capacitor is required. See the Input and Output Capacitor Requirements (CIN and COUT) section for more details. |
OUT | 1, 19, 20 | O | Regulated output pin. A 22-μF or larger ceramic capacitor is required for stability (a 10-μF minimum effective capacitance is required). See the Input and Output Capacitor Requirements (CIN and COUT) section for more details. |
PG | 4 | O | Active-high power-good pin. An open-drain output indicates when the output voltage reaches 89% of the target. The use of a feed-forward capacitor may disrupt PG (power good) functionality. See the Power-Good Function section for more details. |
SNS | 2 | I | Output voltage sense input pin. Connect this pin only if the ANY-OUT feature is used. See the ANY-OUT Programmable Output Voltage and Adjustable Operation sections for more details. |
NR/SS | 13 | — | Noise-reduction and soft-start pin. Connecting an external capacitor between this pin and ground reduces reference voltage noise and also enables the soft-start function. Although not required, a capacitor is recommended for low-noise applications to connect a 10-nF capacitor from NR/SS to GND (as close to the device as possible) to maximize ac performance. See the Noise-Reduction and Soft-Start Capacitor (CNR/SS) section for more details. |
Thermal Pad | Pad | — | Connect the thermal pad to a large-area ground plane. The thermal pad is internally connected to GND. |