SBVS281A March   2016  – July 2016 TPS7A87

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Voltage Regulation Features
        1. 7.3.1.1 DC Regulation
        2. 7.3.1.2 AC and Transient Response
      2. 7.3.2 System Start-Up Features
        1. 7.3.2.1 Programmable Soft-Start (NR/SSx)
        2. 7.3.2.2 Sequencing
          1. 7.3.2.2.1 Enable (ENx)
          2. 7.3.2.2.2 Undervoltage Lockout (UVLOx) Control
          3. 7.3.2.2.3 Active Discharge
        3. 7.3.2.3 Power-Good Output (PGx)
      3. 7.3.3 Internal Protection Features
        1. 7.3.3.1 Foldback Current Limit (ICLx)
        2. 7.3.3.2 Thermal Protection (Tsdx)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Regulation
      2. 7.4.2 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 External Component Selection
        1. 8.1.1.1 Setting the Output Voltage (Adjustable Operation)
        2. 8.1.1.2 Capacitor Recommendations
        3. 8.1.1.3 Input and Output Capacitor (CINx and COUTx)
        4. 8.1.1.4 Feed-Forward Capacitor (CFFx)
        5. 8.1.1.5 Noise-Reduction and Soft-Start Capacitor (CNR/SSx)
      2. 8.1.2 Start-Up
        1. 8.1.2.1 Circuit Soft-Start Control (NR/SSx)
          1. 8.1.2.1.1 In-Rush Current
        2. 8.1.2.2 Undervoltage Lockout (UVLOx) Control
        3. 8.1.2.3 Power-Good (PGx) Function
      3. 8.1.3 AC and Transient Performance
        1. 8.1.3.1 Power-Supply Rejection Ratio (PSRR)
        2. 8.1.3.2 Channel-to-Channel Output Isolation and Crosstalk
        3. 8.1.3.3 Output Voltage Noise
        4. 8.1.3.4 Optimizing Noise and PSRR
          1. 8.1.3.4.1 Charge Pump Noise
        5. 8.1.3.5 Load Transient Response
      4. 8.1.4 DC Performance
        1. 8.1.4.1 Output Voltage Accuracy (VOUTx)
        2. 8.1.4.2 Dropout Voltage (VDO)
          1. 8.1.4.2.1 Behavior when Transitioning from Dropout into Regulation
      5. 8.1.5 Reverse Current Protection
      6. 8.1.6 Power Dissipation (PD)
        1. 8.1.6.1 Estimating Junction Temperature
        2. 8.1.6.2 Recommended Area for Continuous Operation (RACO)
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Modules
        2. 11.1.1.2 SPICE Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RTJ|20
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

RTJ Package
4-mm × 4-mm, 20-Pin WQFN
Top View

Pin Functions

PIN DESCRIPTION
NAME NO. I/O
EN1 20 I Enable pin for each channel. These pins turn the regulator on and off. If VENx(1) ≥ VIH(ENx), then the regulator is enabled. If VENx ≤ VIL(ENx), then the regulator is disabled. The ENx pin must be connected to INx if the enable function is not used.
EN2 6
FB1 16 I Feedback pin connected to the error amplifier. Although not required, a 10-nF feed-forward capacitor from FBx to OUTx (as close to the device as possible) is recommended to maximize ac performance. The use of a feed-forward capacitor can disrupt PGx (power good) functionality. See the Feed-Forward Capacitor (CFFx) and Setting the Output Voltage (Adjustable Operation) sections for more details.
FB2 10
GND 3, 13 — Ground pin.
These pins must be connected to ground, the thermal pad, and each other with a low-impedance connection.
IN1 1, 2 I Input supply pin for LDO 1.
A 10 µF or greater input capacitor is required. Place the input capacitor as close to the input as possible.
IN2 4, 5 I Input supply pin for LDO 2.
A 10 µF or greater input capacitor is required. Place the input capacitor as close to the input as possible.
NR/SS1 19 — Noise-reduction and soft-start pin for each channel. Connecting an external capacitor between this pin and ground reduces reference voltage noise and also enables the soft-start function. Although not required, a 10 nF or larger capacitor is recommended to be connected from NR/SSx to GND (as close to the pin as possible) to maximize ac performance. See the Noise-Reduction and Soft-Start Capacitor (CNR/SSx) section for more details.
NR/SS2 7
OUT1 14, 15 O Regulated output for LDO 1. A 10-μF or larger ceramic capacitor (5 μF or greater of effective capacitance) from OUTx to ground is required for stability and must be placed as close to the output as possible. Minimize the impedance from the OUT1 pin to the load. See the Input and Output Capacitor (CINx and COUTx) section for more details.
OUT2 11, 12 O Regulated output for LDO 2. A 10-μF or larger ceramic capacitor (5 μF or greater of effective capacitance) from OUTx to ground is required for stability and must be placed as close to the output as possible. Minimize the impedance from the OUT2 pin to the load. See the Input and Output Capacitor (CINx and COUTx) section for more details.
PG1 17 O Open-drain power-good indicator pins for the LDO 1 and LDO 2 output voltages. A 10-kΩ to 100-kΩ external pullup resistor is required. These pins can be left floating or connected to GND if not used. The use of a feed-forward capacitor can disrupt power-good functionality. See the Feed-Forward Capacitor (CFFx) section for more details.
PG2 9
SS_CTRL1 18 I Soft-start control pin for each channel. Connect these pins either to GND or INx to allow normal or fast charging of the NR/SSx capacitor. If a CNR/SSx capacitor is not used, SS_CTRLx must be connected to GND to avoid output overshoot.
SS_CTRL2 8
Thermal pad — Connect the thermal pad to a large-area ground plane. The thermal pad is internally connected to GND.
(1) Lowercase x indicates that the specification under consideration applies to both channel 1 and channel 2, one channel at a time.