SLVSCP3C January   2015  – July 2016 TPS7B4253-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Short Circuit and Overcurrent Protection
      2. 7.3.2 Integrated Inductive Clamp Protection
      3. 7.3.3 OUT Short to Battery and Reverse Polarity Protection
      4. 7.3.4 Undervoltage Shutdown
      5. 7.3.5 Thermal Protection
      6. 7.3.6 Regulated Output (OUT)
      7. 7.3.7 Enable (EN)
      8. 7.3.8 Adjustable Output Voltage (FB and ADJ)
        1. 7.3.8.1 OUT Voltage Equal to the Reference Voltage
        2. 7.3.8.2 OUT Voltage Higher Than Reference Voltage
        3. 7.3.8.3 Output Voltage Lower Than Reference Voltage
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VIN < 4 V
      2. 7.4.2 Operation With EN Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Application With Output Voltage Equal to the Reference Voltage
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Input Capacitor
          2. 8.2.1.2.2 Output Capacitor
        3. 8.2.1.3 Application Curve
      2. 8.2.2 High-Side Switch Configuration
      3. 8.2.3 High Accuracy LDO
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation and Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resource
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The TPS7B4253-Q1 device is a 300-mA low-dropout tracking regulator with ultralow tracking tolerance. The PSpice transient model is available for download on the product folder and can be used to evaluate the basic function of the device.

8.2 Typical Application

8.2.1 Application With Output Voltage Equal to the Reference Voltage

Figure 27 shows the typical application circuit for the TPS7B4253-Q1 device (using the HTSSOP package as an example). Different values of external components can be used depending on the end application. An application may require a larger output capacitor during fast load steps to prevent a large drop on the output voltage. TI recommends using a low-ESR ceramic capacitor with a dielectric of type X5R or X7R.

TPS7B4253-Q1 schematic_app_slvscp3.gif Figure 27. Output Voltage Equals the Reference Voltage

8.2.1.1 Design Requirements

For this design example, use the parameters listed in Table 1 as the design parameters.

Table 1. Design Parameters

DESIGN PARAMETER EXAMPLE VALUE
Input voltage 4 to 40 V
Output voltage 1.5 to 40 V
Enable voltage 2 to 40 V
ADJ voltage 1.5 to 18 V
Output capacitor 10 to 500 µF
Output capacitor ESR range 0.001 to 20 Ω

8.2.1.2 Detailed Design Procedure

To begin the design process, determine the following:

  • Input voltage range
  • Output voltage
  • Reference voltage
  • Output current
  • Current limit

8.2.1.2.1 Input Capacitor

The device requires an input decoupling capacitor, the value of which depends on the application. The typical recommended value for the decoupling capacitor is 2.2 µF. The voltage rating must be greater than the maximum input voltage.

8.2.1.2.2 Output Capacitor

To ensure the stability of the TPS7B4253-Q1 device, the device requires an output capacitor with a value in the range from 10 µF to 500 µF and with an ESR range from 0.001 Ω to 20 Ω when the FB pin is directly connected to the OUT pin. TI recommends selecting a ceramic capacitor with low ESR to improve the load transient response.

To achieve an output voltage higher than the reference voltage, a resistor divider is connected between the OUT pin and the FB pin. In this case, a 47-nF feed forward capacitor must be connected between the OUT and FB pins for loop stability. The ESR of the output capacitor must be from 0.001 Ω to 10 Ω.

When multiple capacitors (two or more) are connected in parallel at the OUT pin, the ESR range of each output capacitor must be from 0.001 Ω to 3 Ω for loop stability.

In case the FB pin is shorted to ground, the TPS7B4253-Q1 device functions as a power switch with no need for the output capacitor.

8.2.1.3 Application Curve

TPS7B4253-Q1 transient_6-40V_line_100mA_rising_slvscp3.gif
VIN = 6 to 40 V VADJ = 5 V C(OUT) = 10 µF
IOUT = 100 mA, 20 µs/div
Figure 28. 6- to 40-V Line Transient

8.2.2 High-Side Switch Configuration

As shown in Figure 29, by connecting the FB pin to the GND pin, the TPS7B4253-Q1 device can be used as a high-side switch with current-limit, thermal shutdown, output short-to-battery, and reverse polarity protection. The switching on and off of the device is then controlled through the EN and ADJ pins.

TPS7B4253-Q1 typ_app_high-side_switch_slvscp3.gif Figure 29. High-Side Switch Application

8.2.3 High Accuracy LDO

With an accurate voltage rail, the TPS7B4253-Q1 device can be used as an LDO with ultrahigh-accuracy output voltage by configuring the device as shown in Figure 30.

TPS7B4253-Q1 typ_app_high-accur_ldo_slvscp3.gif Figure 30. High-Accuracy LDO Application

For example, assume the reference voltage is a 5-V rail with 0.5% accuracy. Because the tracking accuracy between the ADJ and OUT pins is specified below 4 mV across temperature, the output accuracy of the TPS7B4253-Q1 device can be calculated with Equation 4.

Equation 4. TPS7B4253-Q1 q_01_slvscp3.gif