JAJSRB5A September   2023  – November 2023 TPS7B4256-Q1

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Tracker Output Voltage (VOUT)
        1. 6.3.1.1 Output Voltage Equal to Reference Voltage
        2. 6.3.1.2 Output Voltage Less Than the Reference Voltage
        3. 6.3.1.3 Output Voltage Larger Than the Reference Voltage
      2. 6.3.2 Reverse Current Protection
      3. 6.3.3 Undervoltage Lockout
      4. 6.3.4 Thermal Protection
      5. 6.3.5 Current Limit
      6. 6.3.6 Output Short to Battery
      7. 6.3.7 Tracking Regulator With an Enable Circuit
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Operation With VIN < 3 V
      4. 6.4.4 Disable With ADJ/EN Control
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Dropout Voltage
      2. 7.1.2 Reverse Current
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input and Output Capacitor Selection
        2. 7.2.2.2 Feedback Resistor Selection
        3. 7.2.2.3 Feedforward Capacitor
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Package Mounting
        2. 7.4.1.2 Board Layout Recommendations to Improve PSRR and Noise Performance
        3. 7.4.1.3 Power Dissipation and Thermal Considerations
        4. 7.4.1.4 Thermal Performance Versus Copper Area
        5. 7.4.1.5 Layout Examples
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 ドキュメントの更新通知を受け取る方法
    3. 8.3 サポート・リソース
    4. 8.4 Trademarks
    5. 8.5 静電気放電に関する注意事項
    6. 8.6 用語集
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Electrical Characteristics

specified at TJ = –40°C to +150°C, VIN = 13.5 V, VOUT = VFB, IOUT = 100 µA, COUT = 1 µF, CIN = 1 µF and VADJ/EN = 5 V (unless otherwise noted); typical values are at TJ = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IQ Quiescent current VIN = 5.4 V to 40 V, VADJ/EN = 5 V, IOUT = 100 µA, TJ = 25ºC 50 60 µA
VIN = 5.4 V to 40 V, VADJ/EN = 5 V, IOUT = 100 µA, –40ºC < TJ < 85ºC 65
VIN = 5.4 V to 40 V, VADJ/EN = 5 V, IOUT = 100 µA 70
IGND Ground current VIN = 5.4 V to 40 V, VADJ/EN = 5 V, IOUT = 70 mA 1 mA
ISHUTDOWN Shutdown supply current  VEN = 0 V 3.5 µA
IADJ/EN ADJ/EN pin current IOUT = 100 µA to 70 mA 0.9 µA
VUVLO(RISING) Rising input supply UVLO VIN rising, IOUT = 5 mA 2.6 2.7 2.85 V
VUVLO(FALLING) Falling input supply UVLO VIN falling, IOUT = 5 mA 2.3 2.4 2.5 V
VUVLO(HYST) VUVLO(IN) hysteresis 300 mV
VIL Enable logic input low level 0.8 V
VIH Enable logic input high level 1.8 V
VOUT Regulated output VIN = VOUT + 400 mV to 40 V, IOUT = 100 µA to 70 mA –6 6 mV
ΔVOUT(ΔVIN) Line regulation VIN = VOUT + 400 mV to 40 V, IOUT = 100 µA –0.4 0.4 mV
ΔVOUT(ΔIOUT) Load regulation VIN = VOUT + 400 mV, IOUT = 100 µA to 70 mA (1)  –0.5 0.5 mV
VDO Dropout voltage  IOUT = 70 mA, VADJ/EN ≥ 3.3 V, VIN = VADJ/EN 130 225 mV
ICL Output current limit VIN = VOUT + 1 V, VOUT short to 90% x VADJ/EN 85 105 125 mA
PSRR Power-supply ripple rejection VRIPPLE = 1 VPP, frequency = 100 Hz, IOUT ≥ 5 mA 80 dB
Vn Output noise voltage VOUT = 3.3 V, IOUT = 1 mA, a 5 µVRMS reference is used for this measurement 150 µVRMS
IREV Reverse current at VIN VIN = 0 V, VOUT = 32 V, VADJ/EN = 5 V –0.6 0.6 µA
IREV-N1 Reverse current at negative VIN VIN = –20 V, VOUT = 20 V, VADJ/EN = 5 V –1.1 1.1 µA
IREV-N2 Reverse current at negative VIN VIN = –20 V, VOUT = 0 V, VADJ/EN = 5 V –0.6 0.6 µA
IFB Feedback pin current 0.1 0.25 µA
TJ Junction temperature –40 150 °C
TSD(SHUTDOWN) Junction shutdown temperature 175 °C
TSD(HYST) Hysteresis of thermal shutdown 15 °C
Power dissipation is limited to 2 W for device production testing purposes. The power dissipation can be higher during normal operation. See the thermal dissipation section for more information on how much power the device can dissipate while maintaining a junction temperature below 150℃.