High power overcurrent events are characterized by duration, the input and output voltage they occur at, and the resulting current. In these high power overcurrent conditions, the dissipated power in the pass element becomes much greater than nominal operating conditions. Depending on the specific overcurrent conditions, the device heats up until reaching thermal shutdown. However, depending on the specific overcurrent event, the device may heat faster than the thermal shutdown circuitry can respond.

Table 8-1 specifies resistors values for a desired current limit setting and the anticipated accuracy of the programmable current limit at the specified setting; 3A is a recommended maximum programmable current limit setting as the 20% accuracy has a maximum current limit of 3.6A, which is below the Absolute Maximum rating of 3.9A.

The magnitude of the over-current condition intensifies as a function of the V_IN - V_OUT differential and pulse width (for faults to be evaluated as DC a 1s pulse can be used). By combining the input and output voltage differential, fault pulse width, and programmable current limit setting, a recommended programmable current limit protection area is derived as shown in Figure 9-2 which was characterized using validation hardware for the TPS7H1121 (ceramic package) under laboratory ambient conditions (T_A = 25ºC). The effective thermal resistance of the thermal pad is calculated to be R_TH(PCB) = 5ºC/W (taking into account thermal via diameter, spacing, and board layers), and the programmable current limit I_PCL was set for the maximum allowable current of 3.6A. Applied faults of a pulse width of 10ms, 100ms and 1s were applied until the device was no longer functional; the applied voltage and programmed current were then adjusted lower on subsequent units until the curve was determined.

The depicted curve is very dependent on assumed ambient temperatures, package thermal resistance, PCB thermal resistances and nature of the applied short; the curve below is only applicable for the ceramic unit and the validation hardware utilized.

Figure 9-2 Programmable Current Limit Protection Area