JAJSLN2 November   2021 TPS7H1210-SEP

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Enable Pin Operation
      3. 7.3.3 Programmable Soft-Start
      4. 7.3.4 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adjustable Operation
      2. 8.1.2 Capacitor Recommendations
      3. 8.1.3 Noise Reduction and Feed-Forward Capacitor Requirements
      4. 8.1.4 Power-Supply Rejection Ratio (PSRR)
      5. 8.1.5 Output Noise
      6. 8.1.6 Transient Response
      7. 8.1.7 Post DC-DC Converter Filtering
      8. 8.1.8 Power for Precision Analog
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don’ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Improve PSRR and Noise Performance
    2. 10.2 Layout Example
    3. 10.3 Thermal Performance
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Spice Models
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 用語集
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.1.1 Adjustable Operation

The TPS7H1210-SEP has an output voltage range of VREF to –15.5 V. The nominal output voltage of the device is set by two external resistors, as shown in GUID-C89E1021-DD2D-4B4A-AEAE-1B800333FB58.html#SBVS1691608.

RFB_TOP and RFB_BOT can be calculated for any output voltage range using #SBVS1259608. To ensure stability under no-load conditions at |VOUT| > |VREF|, this resistive network must provide a current equal to or greater than 5 μA.

Equation 2. R F B _ T O P = R F B _ B O T × V O U T V R E F - 1 ,   w h e r e   V R E F R F B _ B O T > 5   µ A

Table 8-1 shows the resistor combinations to achieve a few of the most common rails using commercially available, 1%-tolerance resistors. If greater voltage accuracy is required, consider the output voltage offset contributions because of the feedback pin current and use 0.1%-tolerance resistors.

Table 8-1 Example 1% Tolerance Resistors for Common Voltage Rails
VOUT
(V)		RFB_TOP
(kΩ)		RFB_BOT
(kΩ)		RESISTOR NETWORK BIAS CURRENT (µA)RESISTOR ERROR CONTRIBUTION#GUID-7C80B78E-5D32-493C-963D-26DC31EA9D69
–1.1820 ∞N/AN/A
–1.87.321484.4+0.001%
–2.5 11.3 10.2 115.9 +0.341%
–3.319.110.7110.5–0.245%
–53410.5112.6–0.189%
–9 115 17.4 67.9 +0.066%
–1044515.476.8–0.086%
–121371578.8+0.187%
–1513311.3104.6–0.627%
(1) This is the error contribution due to the mismatch between the ideal resistor ratio and the actual resistor ratio (using the indicated resistor values). It does not include the error contribution due to the resistor tolerance itself. More accurate ratios are possible by using 0.1% tolerance resistors.