JAJSQV1A July 2023 – October 2023 TPS7H2140-SEP
PRODUCTION DATA
A high-accuracy current limit allows high reliability of the design. It protects the load and the power supply from overstressing during short-circuit-to-GND or power-up conditions. The current limit can also save system cost by reducing the size of PCB traces and connectors, and the capacity of the preceding power stage.
When a current-limit threshold is hit, a closed loop activates immediately. The output current is clamped at the set value, and a fault is reported out. The device heats up due to the high power dissipation on the power FET. If thermal shutdown occurs, the current limit is set to ICL_TSD (if set externally) or ICL_INTERNAL_TSD (when using internal) to reduce the power dissipation on the power FET. See Figure 8-4 for more details.
The device has two current-limit thresholds.
Note that if using a GND network which causes a level shift between the device GND and board GND, the CL pin must be connected with device GND.
For better protection from a hard short-to-GND condition (when the ENx pins are enabled, a short to GND occurs suddenly), the device implements a fast-trip protection to turn off the related channel before the current-limit closed loop is set up. The fast-trip response time is less than 1 μs, typically. With this fast response, the device can achieve better inrush current-suppression performance.