JAJSQS4C July   2023  – April 2024 TPS7H6003-SP , TPS7H6013-SP , TPS7H6023-SP

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Comparison Table
  6. Device Options Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Quality Conformance Inspection
    8. 7.8 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Input Voltage
      2. 8.3.2  Linear Regulator Operation
      3. 8.3.3  Bootstrap Operation
        1. 8.3.3.1 Bootstrap Charging
        2. 8.3.3.2 Bootstrap Capacitor
        3. 8.3.3.3 Bootstrap Diode
        4. 8.3.3.4 Bootstrap Resistor
      4. 8.3.4  High-Side Driver Startup
      5. 8.3.5  Inputs and Outputs
      6. 8.3.6  Dead Time
      7. 8.3.7  Input Interlock Protection
      8. 8.3.8  Undervoltage Lockout and Power Good (PGOOD)
      9. 8.3.9  Negative SW Voltage Transients
      10. 8.3.10 Level Shifter
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Bootstrap and Bypass Capacitors
        2. 9.2.2.2 Bootstrap Diode
        3. 9.2.2.3 BP5x Overshoot and Undershoot
        4. 9.2.2.4 Gate Resistor
        5. 9.2.2.5 Dead Time Resistor
        6. 9.2.2.6 Gate Driver Losses
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Examples
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • HBX|48
サーマルパッド・メカニカル・データ
発注情報

Bootstrap and Bypass Capacitors

The external bootstrap capacitor needs to maintain operation above the BOOT UVLO falling threshold during normal operation. As a best design practice, size the capacitor to allow for substantial margin above this threshold. The first step in determining the bootstrap capacitor value is calculating for ∆VBOOT. This is the maximum allowable drop on the bootstrap capacitor:

Equation 10. VBOOTVIN-n×VF-VBOOT_UVLO =12 V-1×0.9 V-6.65 V=4.35 V

where:

  • n is the number of bootstrap diodes used in series
  • VF is the voltage drop of the bootstrap diode chosen
  • VBOOT_UVLO is the BOOT UVLO falling threshold voltage

To maintain significant margin and account for any additional voltage drop across the bootstrap resistor used and also for load transients, the capacitor is calculated for ∆VBOOT of 1.5 V. Referring to Bootstrap Capacitor, the value of Qtotal needs to first be determined, and then CBOOT can subsequentially be calculated:

Equation 11. Qtotal=Qg+IQBG×DMAXfSW+IQHSfSW=10.6 nC+20 μA × 0.35500 kHz+4 mA500 kHz=18.6 nC
Equation 12. CBOOTQtotalVBOOT= 18.6 nC1.5 V=12.4 nF

A minimum value of 12.4 nF is needed for the design. However, given the potential for capacitance changes with temperature and applied voltage, as well as unexpected circuit behavior such as load transients that impact the bootstrap charging time, a 100 nF X7R capacitor is selected.

The VIN capacitor selected must be larger than the bootstrap capacitor. General rule of thumb dictates that this capacitor is at least ten times the bootstrap capacitor value, which gives 1 μF capacitor in this instance. For the evaluation setup, a 2.2 μF and 1 μF capacitor were used at VIN, both ceramic X7R type capacitors. The recommendation is to place these capacitors and the bootstrap capacitors as close the respective pins as possible. Select capacitors with voltage ratings that are suffiently larger than the maximum applied voltage (i.e. greater than two times if possible).

Lastly, as detailed in Linear Regulator Operation, select high-quality 1 μF X7R ceramic capacitors for use at BP5H, BP5L, and BP7L outputs. Place these capacitors in close proximity to the respective pins.