JAJSQS4C July 2023 – April 2024 TPS7H6003-SP , TPS7H6013-SP , TPS7H6023-SP
PRODUCTION DATA
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
The external bootstrap capacitor needs to maintain operation above the BOOT UVLO falling threshold during normal operation. As a best design practice, size the capacitor to allow for substantial margin above this threshold. The first step in determining the bootstrap capacitor value is calculating for ∆VBOOT. This is the maximum allowable drop on the bootstrap capacitor:
where:
To maintain significant margin and account for any additional voltage drop across the bootstrap resistor used and also for load transients, the capacitor is calculated for ∆VBOOT of 1.5 V. Referring to Bootstrap Capacitor, the value of Qtotal needs to first be determined, and then CBOOT can subsequentially be calculated:
A minimum value of 12.4 nF is needed for the design. However, given the potential for capacitance changes with temperature and applied voltage, as well as unexpected circuit behavior such as load transients that impact the bootstrap charging time, a 100 nF X7R capacitor is selected.
The VIN capacitor selected must be larger than the bootstrap capacitor. General rule of thumb dictates that this capacitor is at least ten times the bootstrap capacitor value, which gives 1 μF capacitor in this instance. For the evaluation setup, a 2.2 μF and 1 μF capacitor were used at VIN, both ceramic X7R type capacitors. The recommendation is to place these capacitors and the bootstrap capacitors as close the respective pins as possible. Select capacitors with voltage ratings that are suffiently larger than the maximum applied voltage (i.e. greater than two times if possible).
Lastly, as detailed in Linear Regulator Operation, select high-quality 1 μF X7R ceramic capacitors for use at BP5H, BP5L, and BP7L outputs. Place these capacitors in close proximity to the respective pins.