TPS92513 1.5A Buck LED Driver with Integrated Analog Current Adjust

8.3.1 Undervoltage Lockout and Low Power Shutdown (UVLO Pin)

The TPS92513 contains an internal under-voltage lockout circuit on the VIN pin of the device. However, this internal UVLO is for device protection only and does not contain hysteresis. The UVLO pin of the device should always be used to set the minimum VIN voltage that the circuit operates at. This level should be set using the minimum input voltage expected for the application with a minimum setting of 4.5 V.

The UVLO pin has an internal pull-up current source of 1 µA (I1) that will provide a default ON state in the event the UVLO pin is left floating (not recommended). When the UVLO pin voltage exceeds 1.22 V (V_EN), an additional 2.9 µA of hysteresis current is added (see Figure 11). This additional current provides the input voltage hysteresis. Use Equation 1 to set the external hysteresis (V_HYS) for the input voltage. Use Equation 2 to set the input rising start voltage, V_START. When the UVLO pin is pulled low, the internal regulators are shut down, the device enters a low-power shutdown mode and the compensation capacitor on the COMP pin, C_COMP, is discharged.

Figure 11. Adjustable Undervoltage Lockout (UVLO)

Equation 1.

Equation 2.

Equation 3.

Equation 4.

8.3.2 Adjustable Switching Frequency (RT/CLK Pin)

The switching frequency of the TPS92513 is adjustable over a wide range from 100 kHz to 2 MHz by placing a resistor, R_RT, on the RT/CLK pin. The RT/CLK pin voltage is typically 0.5 V and must have a resistor to ground to set the switching frequency. To determine the timing resistance for a given switching frequency, use Equation 5 or the curves in Figure 3 or Figure 4. To reduce the solution size one typically sets the switching frequency as high as possible, but tradeoffs of the supply efficiency, maximum input voltage and minimum controllable on time should be considered. The minimum controllable on time, t_ON(min), limits the maximum operating input voltage.

Equation 5.

Equation 6.

8.3.3 Synchronizing the Switching Frequency to an External Clock (RT/CLK Pin)

The RT/CLK pin can be used to synchronize the regulator to an external system clock by connecting a square wave to the RT/CLK pin through the circuit network as shown in Figure 12. The square wave amplitude must transition lower than 0.63 V and higher than 1.81 V on the RT/CLK pin and have an on-time greater than 51 ns and an off-time greater than 100 ns. The synchronization frequency range is 300 kHz to 2 MHz. The rising edge of the PH is synchronized to the falling edge of RT/CLK pin signal. The internal oscillator provides default switching frequency set by connecting the resistor from the RT/CLK pin to ground should the synchronization signal turn off.

It is required to AC couple the synchronization signal through a 470 pF ceramic capacitor and a 4 kΩ series resistor to the RT/CLK pin. The series resistor reduces PH jitter in heavy load applications when synchronizing to an external clock and in applications which transition from synchronizing to RT mode. The first time the RT/CLK pin is pulled above the CLK threshold the device switches from the RT resistor frequency to PLL mode. The internal 0.5 V voltage source is removed and the CLK pin becomes high impedance as the PLL starts to lock onto the external signal. Since there is a PLL on the regulator, the switching frequency can be higher or lower than the frequency set with the external resistor. The device transitions from the resistor mode to the PLL mode and then increases or decreases the switching frequency until the PLL locks onto the CLK frequency within 100 microseconds.

When the device transitions from the PLL to resistor mode, the switching frequency slows down from the CLK frequency to 150 kHz, then reapplies the 0.5 V voltage and the resistor then sets the switching frequency. It is not recommended that a system transition from PLL mode to resistor mode repeatedly during operation. When the PLL loses the external clock input the default 150 kHz switching frequency creates long on-times, which result in higher inductor ripple currents. This can lead to inductor saturation if the system is not designed to operate at this frequency.

Figure 12. Frequency Synchronization

8.3.4 Adjustable LED Current (IADJ and ISENSE Pins)

The LED current can be set, and controlled dynamically, by using the IADJ pin of the TPS92513. Equation 7 shows the relationship between the voltage applied to IADJ (V_IADJ) and the regulation setpoint at the ISENSE pin. Equation 8 shows how to calculate the value of the current setting resistor (R_ISENSE) from the ISENSE pin to ground for the desired LED current.

Equation 7.

Equation 8.

The IADJ pin voltage range is 0 V to 1.8 V and is internally clamped at 1.8 V. If analog current adjustment will not be used, the IADJ pin can be connected to VIN through a resistor for a default ISENSE voltage of 300 mV. This resistor should be sized so that the current into the IADJ pin is limited to 100 µA or less at the maximum input voltage. A precision reference between 0 V and 1.8 V can also be used on IADJ to control the ISENSE voltage. If no external voltage source is available, the IADJ pin can be tied to the RT/CLK pin either directly or using a resistor divider to generate a voltage between 0 V and 500 mV. If a resistor divider is used off the RT/CLK pin to generate the IADJ voltage it will introduce a parallel resistance with the RT resistor. High value resistors are recommended in that case and the parallel combination must be used to calculate the switching frequency. The current sense voltage is most accurate with IADJ voltages between 180 mV and 1.8 V for a dimming range of 10:1. Below 180 mV the TPS92513 dims well but may have more variation between circuits. Due to internal offsets pulling IADJ to 0 V will not result in a current sense voltage of 0 V. Some small current will continue to run unless the PDIM pin is pulled low or the device is disabled using the UVLO pin. Analog dimming is also most accurate when the device is in continuous conduction mode (CCM). If the highest accuracy possible is desired during analog dimming, size the inductor so that 1/2 the peak-to-peak inductor ripple is less than the minimum LED current to remain in CCM. The IADJ pin should be decoupled with a 10 nF capacitor to ground. A 1 kΩ resistor should be used between the ISENSE pin and R_ISENSE to protect the pin in the event R_ISENSE opens or there is a transient due to one or more LEDs shorting.

8.3.5 PWM Dimming (PDIM Pin)

The TPS92513 incorporates a PWM dimming input pin, which directly controls the enable/disable state of the internal gate driver. When PDIM is low, the gate driver is disabled. The PDIM pin has a 1 µA pull-up current source, which creates a default ON state when the PDIM pin is floating. When PDIM goes low, the gate driver shuts off and the LED current quickly reduces to zero. A square wave of variable duty cycle should be used and should have a low level below 0.79 V and a high level of 1.45 V or above.

The TPS92513 uses a sample-and-hold switch on the error amplifier output. During the PDIM off-time the COMP voltage remains unchanged. Also, the error amplifier output is internally clamped low. These techniques help the system recover to its regulation duty cycle quickly. The dimming frequency range is 100 Hz to 1 kHz and the minimum duty cycle is only limited in cases where the BOOT capacitor can discharge below its under-voltage threshold of 2 V (VIN is within 2 V of the total output voltage).

8.3.6 External Compensation (COMP Pin)

The TPS92513 error amplifier output is connected to the COMP pin. The TPS92513 is a simple device to stabilize and only requires a capacitor from the COMP pin to ground (C_COMP). A 0.1 µF capacitor is recommended and will work well for most all applications. If an application requires faster response to input voltage transients, a capacitor as small as 0.01 µF will work for most applications if needed. The overall system bandwidth can be approximated using Equation 9.

Equation 9.

8.3.7 Overcurrent Protection

Overcurrent can be the result of a shorted sense resistor or a direct short from VOUT to GND. In either case, the voltage at the ISENSE pin is zero and this causes the COMP pin voltage to rise. When V_COMP reaches approximately 2.2 V, it is internally clamped and functions as a MOSFET current limit. The TPS92513 limits the MOSFET current to 6 A (typical). If the shorted condition persists, the TPS92513 junction temperature increases. If it increases above 165°C, the thermal shutdown protection is activated.

8.3.8 Overtemperature Protection

The TPS92513 includes a thermal shutdown circuit to protect the device from over-temperature conditions. The device can overheat due to high ambient temperatures, high internal power dissipation, or both. In the event the die temperature reaches 165°C the device will shut down until the die temperature falls 20°C at which point it will turn back on.

8.4.1 Start-Up

To reduce inrush current and to keep the regulator in control during all startup conditions the TPS92513 employs a startup mode that behaves differently than during normal operation (regulation mode). The UVLO conditions must be satisfied before the TPS92513 is allowed to switch. When the UVLO pin is held low the device enters a low-power shutdown mode, and some internal circuits are deactivated to conserve power. When UVLO returns high these circuits are enabled, which results in a delay of approximately 50 µs (typical) before switching starts. During start-up the TPS92513 operates in a minimum pulse width mode which is an open-loop control. At the start of each switching cycle the internal oscillator initiates a SET pulse. The high-side MOSFET turns on with a minimum pulse width of 140 ns (typical), independent of the COMP voltage. The device does not pulse skip. While operating in minimum pulse width mode, the LED bypass capacitor is being charged causing an in-rush current. Also, the COMP voltage begins to rise as the error amplifier output current charges the compensation capacitor. When the COMP voltage reaches approximately 0.7 V, the error amplifier is ensured to be out of saturation and to have sufficient gain to regulate the loop. The TPS92513 then transitions from minimum pulse width mode to regulation mode. During regulation mode the error amplifier is now in closed-loop control of the system. The gain of the error amplifier quickly increases the duty cycle, which causes the output voltage to increase. Once the output voltage approaches the forward voltage of the LED string, the LED current quickly begins to increase until it reaches regulation.

There is a slight delay from the time the VIN and EN UVLO conditions are satisfied until the time the error amplifier has control of the feedback loop. This delay is a result of the time it takes COMP to charge the compensation capacitor to 0.7 V. This delay can be approximated as shown in Equation 10.

Equation 10.

The peak inrush current, I_PEAK, can be calculated to a first order approximation using Equation 11 and the value of the output capacitor, C_OUT.

Equation 11.

8.4.2 Minimum Pulse Width and Limitations

The TPS92513 is designed to output a minimum pulse width during each switching cycle of 140 ns (typical). The control loop cannot regulate the system to an on-time less than this amount, and it does not skip pulses. When attempting to operate below the minimum on-time the system loses regulation and the LED current increases. This puts a practical limitation on the system operating conditions, as shown in Equation 12.

Equation 12.

Where V_OUT equals the forward voltage of the LED string plus the reference voltage V_ISENSE.

The system can avoid this operating condition by limiting the maximum input voltage as shown in Equation 12. If the input voltage cannot be limited due to application, then the switching frequency can be lowered, or the output voltage increased. This region of operation typically occurs with high input voltages, high operating frequencies, and low output voltages.

8.4.3 Maximum Duty Cycle and Bootstrap Voltage (BOOT)

The TPS92513 requires a small 0.1 µF ceramic capacitor between the BOOT and PH pins to provide the gate drive voltage for the high-side MOSFET. The BOOT capacitor is refreshed when the high-side MOSFET turns off, and the freewheeling rectifier diode conducts. A ceramic capacitor with an X7R or X5R dielectric and a minimum voltage rating of 10 V is recommended.

The TPS92513 is designed to operate up to 100% duty cycle as long as the BOOT to PH voltage is greater than at least 2 V. If the BOOT capacitor voltage drops below 2 V, then the BOOT UVLO circuit turns off the MOSFET, which allows the BOOT capacitor to be recharged. The current required from the BOOT capacitor to keep the MOSFET on is quite low. Therefore, many switching cycles occur before the BOOT capacitor is refreshed. In this way, the effective duty cycle of the converter is quite high.

Attention must be taken in maximum duty cycle applications which experience extended time periods with little or no load current such as during PWM dimming. When the voltage across the BOOT capacitor falls below the 2 V UVLO threshold, the high-side MOSFET is turned off, but there may not be enough inductor current to pull the PH pin down to recharge the BOOT capacitor. The high-side MOSFET of the regulator stops switching because the voltage across the BOOT capacitor is less than 2 V. The output capacitor then decays until the difference between the input voltage and output voltage is greater than 2 V, at which point the BOOT UVLO threshold is exceeded, and the device starts switching again until the desired output current is reached. This operating condition persists until the input voltage and/or the load current increases. It is recommended to adjust the VIN stop voltage, V_STOP, to be greater than the BOOT UVLO trigger condition at the minimum load of the application using the adjustable UVLO feature.

8.4.4 Thermal Shutdown and Thermal Limitations

The TPS92513 is a high current density device in a small package. Therefore; it is not capable of providing the full 1.5 A of output current under all conditions without the die reaching the thermal shutdown temperature. To ensure the device will not get too hot the package power dissipation should be calculated and used in conjunction with the device Thermal Information to estimate the maximum die temperature for a given application. The total device power dissipation can be closely approximated using the following equations:

Equation 13.

Equation 14.

Equation 15.

Equation 16.

Equation 17.

Where each are in Watts and

• D is the maximum duty cycle (at minimum input voltage)
• V_OUT is the LED stack voltage plus the reference voltage V_ISENSE
• P_D(SW) is the power dissipated in the MOSFET
• P_D(IQ) is the power dissipated by the internal circuitry
• P_D(AC) are the approximate AC losses due to the MOSFET transitions
• P_TOT is the total device dissipation

9.1.1 Inductor Selection

The value of the buck inductor impacts the peak-to-peak ripple-current amplitude. The peak inductor current is used in current mode control and to maintain a good signal to noise ratio it is recommended that the peak-to-peak ripple current (I_REquation 18) is greater than 75 mA for dependable operation. This allows the control system to have an adequate current signal even at the lowest input voltage. Equation 18 calculates the value for the buck inductance given the minimum ripple current of I_R = 75 mA. Enter the lowest input voltage and the highest output voltage to yield the maximum inductance value.

Equation 18.

Calculate the maximum inductor value for the particular application and choose the next lowest standard value for applications requiring low ripple current. Choose a lower value for size sensitive applications that can tolerate higher LED current ripple or use larger output capacitors. With the chosen value the user can calculate the actual inductor current ripple using Equation 19.

Equation 19.

The inductor RMS current and saturation current ratings must be greater than those seen in the application. This ensures that the inductor does not overheat or saturate. During power-up, transient conditions, or fault conditions, the inductor current can exceed its normal operating current. For this reason, the most conservative approach is to specify an inductor with a saturation current rating equal to or greater than the converter current limit. This is not always possible due to application size limitations. The peak inductor current and the RMS current equations are shown in Equation 20 and Equation 21.

Equation 20.

Equation 21.

9.1.2 Input Capacitor Selection

The TPS92513 requires a high-quality ceramic, type X5R or X7R, input decoupling capacitor of at least 2 µF of effective capacitance per 1 A of output current. Ceramic capacitance tends to decrease as the applied dc voltage increases. This depreciation must be accounted for to ensure that the minimum input capacitance is satisfied. In some applications, additional capacitance is needed to provide bulk energy storage such as high current PWM dimming applications. The input capacitor voltage rating must be greater than the maximum input voltage and have a ripple current rating greater than the maximum input current ripple of the converter. The RMS input ripple current is calculated in Equation 22, where D is the duty cycle (output voltage divided by input voltage). The maximum RMS input ripple current can be calculated by using the minimum input voltage for the application.

Equation 22.

The input capacitance (C_IN) is inversely proportional to the input ripple voltage of the converter. The peak-to-peak input ripple voltage can be calculated as shown in Equation 23. Additionally, this equation can be used to solve for the required input capacitance to keep the input ripple voltage to a defined limit.

Equation 23.

9.1.3 Output Capacitor Selection

During start-up, the TPS92513 uses the discharged output capacitor as a charging path for the BOOT capacitor. In order to ensure that the BOOT capacitor charges and that the converter begins switching immediately, the value of the output capacitor should be 10 times larger than the BOOT capacitor. If the BOOT capacitor is 0.1 µF, then the minimum output capacitor should be 1 µF for the fastest startup time. If the output capacitor is chosen to be a smaller value or none at all, then the BOOT capacitor can charge through the LED string itself. However, this method of charging the BOOT capacitor will result in longer startup times.

The output capacitor also reduces the high-frequency ripple current through the LED string. Various guidelines disclose how much high-frequency ripple current is acceptable in the LED string. Excessive ripple current in the LED string increases the RMS current in the LED string, and therefore the LED temperature also increases. First, calculate the total dynamic resistance of the LED string (R_LED) using the LED manufacturer’s data sheet. Second, calculate the required impedance of the output capacitor (Z_OUT) given the acceptable peak-to-peak ripple current through the LED string, ΔI_LED. I_RIPPLE is the peak-to-peak inductor ripple current as calculated previously in Inductor Selection. Third, calculate the minimum effective output capacitance required. Finally, increase the output capacitance appropriately due to the derating effect of applied dc voltage. See Equation 24, Equation 25, and Equation 26.

Equation 24.

Equation 25.

Equation 26.

9.1.4 Rectifier Diode Selection

The rectifier diode conducts the inductor current only during the high-side MOSFET off-time. The rectifier diode must have a reverse voltage rating greater than the maximum input voltage and a current rating greater than the peak inductor current. A Schottky diode is recommended for highest efficiency and optimal performance. The package size chosen for the rectifier diode must be capable of handling the power dissipation of the diode. The diode power dissipation is equal to the average diode current times the diode forward voltage, V_F. See Equation 27 and Equation 28.

Equation 27.

Equation 28.

When calculating the diode average current, the worst case duty cycle, D, for the diode should be used. D should be calculated using the maximum input voltage for the application in this case.

9.1.5 Output Protection Clamp (Optional)

In the event of an output open circuit during normal operation the output voltage will rise up to the input voltage. This is a safe operating mode provided the output capacitor can sustain the voltage without damage. However, the inductor will still have energy stored at the moment of the event. This can cause significant ringing between the inductor and output capacitor that can shoot higher than VIN. To prevent this, a single Schottky diode from V_OUT to VIN can be used to clamp the ringing. This diode should be rated for at least 500 mA and have a voltage rating greater than or equal to the voltage rating of the rectifier diode. A zener diode across the output capacitor can also be used to clamp the output voltage to a lower level. The output will clamp at the zener voltage plus the ISENSE voltage since when the zener begins to conduct it will pull the ISENSE pin up and reduce the duty cycle.

9.4.1 Standard Component Selection

Choose a 0.1 µF ceramic capacitor with a 10 V or greater rating for C_COMP and C_BOOT. Connect IADJ to VIN through a 10 MΩ resistor to clamp it at 1.8 V and provide an ISENSE voltage regulation point of 300 mV. Connect a 10 nF capacitor from IADJ to ground. Connect ISENSE to R_(ISENSE) through a 1 kΩ resistor.

9.4.2 Calculate UVLO Resistor Values

Using Equation 1 and Equation 2 the UVLO resistors R1 and R2 can be calculated using Equation 29, Equation 30, and the following parameters:

• V_START = 12 V
• V_STOP = 11.2 V
• V_HYS = 0.8 V

Equation 29.

Choose the closest standard 1% value of 176 kΩ for R1. This value can then be used to calculate the value of R2 as shown in Equation 30.

Equation 30.

Choose the closest standard 1% value of 19.3 kΩ for R2.

9.4.3 Calculate the RT Resistor Value (R_RT)

The desired switching frequency is 570 kHz, so the value of R_RT can be calculated using Equation 5 as shown in Equation 31.

Equation 31.

Choose the closest standard 1% value of 200 kΩ for R_RT.

9.4.4 Calculate the ISENSE Resistor Value (R_(ISENSE))

This design uses a V_ISENSE voltage of 300 mV and the desired LED current (I_LED) is 1.5 A. Given these values the sense resistor value can be calculated using Equation 8 as shown in Equation 32.

Equation 32.

0.2 Ω is a standard 1% resistor value. The power dissipation is V_ISENSE multiplied by I_LED, in this case 0.45 W. Choose a 0.5 W or greater resistor.

9.4.5 Calculate the Inductor Value and Operating Parameters (L)

For this application, low LED ripple current is important. One way to reduce LED ripple current is to reduce inductor ripple current. For this low ripple current application, the maximum inductor value (minimum 75 mA current ripple I_R) will be calculated and the next lower value will be used. The maximum inductor value can be calculated using Equation 18 as shown in Equation 33.

Equation 33.

Choose the next lowest standard value of 33 µH. Now the actual inductor current ripple, the peak inductor current, and the RMS inductor current can be calculated using Equation 19, Equation 20, and Equation 21 as shown in Equation 34, Equation 35, and Equation 36.

Equation 34.

Equation 35.

Equation 36.

The inductor chosen should have a saturation current rating higher than I_{L_PEAK} and a DC current rating higher than I_{L_RMS}.

9.4.6 Calculate the Minimum Input Capacitance and the Required RMS Current Rating (C_IN)

Given a minimum of 2 µF of capacitance for every 1 A of LED current, a 1.5 A design would require a minimum of 3 µF. To account for ceramic capacitor tolerances and capacitance drops due to bias voltage this capacitance should be at least doubled. Higher values will also give better overall performance. Choose a 10 µF capacitor with a voltage rating of 50 V or greater. Using Equation 13, Equation 22, and Equation 23 the user can calculate the RMS current rating required for the capacitor and the resulting input voltage ripple as shown in Equation 38 and Equation 39.

Equation 37.

Equation 38.

Equation 39.

9.4.7 Calculate the Output Capacitor Value (C_OUT)

The required output capacitor value to get the required LED ripple current can be calculated by first determining the dynamic resistance of the LEDs used, R_LED, by using the forward voltage versus forward current graph in the manufacturer’s datasheet. Place a tangent line on the curve at the forward current required to get the slope and the corresponding ΔV and ΔF. For this design example, the R_LED is 0.22 Ω per LED. So the total R_LED is 0.22 Ω X 3, or 0.66 Ω. Then find the required output impedance, Z_COUT, using Equation 25 as shown in Equation 40. Using the required Z_COUT calculate the minimum output capacitance using Equation 26 as shown in Equation 41.

Equation 40.

Equation 41.

Choose a 4.7 µF ceramic capacitor with a X5R or X7R dielectric and 16 V or greater voltage rating.

9.4.8 Calculate the Diode Power Dissipation (D)

The maximum input voltage is 48 V, so a 60 V or greater Schottky diode should be used for this application. Calculate the required current rating and power dissipation to size the diode correctly. This should be done at the maximum input voltage since that is where the diode conducts for the most time and will have the highest power dissipation. The duty cycle, D, at the maximum input voltage is 10 V/48 V, or 0.208. Using this duty cycle and Equation 27 calculate the average diode current, I_{D_AVE}, as shown in Equation 42. Then calculate the diode power dissipation, P_DIODE, using Equation 28 as shown in Equation 43.

Equation 42.

Equation 43.

The power dissipation calculation is assuming a diode forward voltage drop, V_F, of 0.7 V. If a diode with a different forward drop is chosen the calculation should be re-done. Choose a Schottky diode with a 1.5 A or greater current rating that can dissipate at least 1 W of power.

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