JAJSOL0A November   2022  – January 2024 TPS92620-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Power Supply (SUPPLY)
        1. 6.3.1.1 Power-On Reset (POR)
        2. 6.3.1.2 Suppply Current in Fault Mode
      2. 6.3.2  Enable and Shutdow(EN)
      3. 6.3.3  Constant-Current Output and Setting (INx)
      4. 6.3.4  Thermal Sharing Resistor (OUTx and RESx)
      5. 6.3.5  PWM Control (PWMx)
      6. 6.3.6  Supply Control
      7. 6.3.7  Diagnostics
        1. 6.3.7.1 LED Short-to-GND Detection
        2. 6.3.7.2 LED Open-Circuit Detection
        3. 6.3.7.3 LED Open-Circuit Detection Enable (DIAGEN)
        4. 6.3.7.4 Overtemperature Protection
        5. 6.3.7.5 Low Dropout Operation
      8. 6.3.8  FAULT Bus Output With One-Fails-All-Fail
      9. 6.3.9  FAULT Table
      10. 6.3.10 LED Fault Summary
      11. 6.3.11 IO Pins Inner Connection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Undervoltage Lockout, V(SUPPLY) < V(POR_rising)
      2. 6.4.2 Normal Operation V(SUPPLY) ≥ 4.5V
      3. 6.4.3 Low-Voltage Dropout Operation
      4. 6.4.4 Fault Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 BCM Controlled Rear Lamp With One-Fails-All-Fail Setup
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Independent PWM Controlled Rear Lamp By MCU
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 ドキュメントの更新通知を受け取る方法
    2. 8.2 サポート・リソース
    3. 8.3 Trademarks
    4. 8.4 静電気放電に関する注意事項
    5. 8.5 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3.8 FAULT Bus Output With One-Fails-All-Fail

During normal operation, The FAULT pin of TPS92620-Q1 is weakly pulled up by an internal pullup current source, I(FAULT_pullup). If any fault scenario occurs, the FAULT pin is strongly pulled low by the internal pulldown current sink, I(FAULT_pulldown) to report out the fault alarm.

Meanwhile, the TPS92620-Q1 also monitors the FAULT pin voltage internally. If the FAULT pin of the TPS92620-Q1 is pulled low by external current sink below VIL(FAULT), the current output is turned off even though there is no fault detected on owned outputs. The device does not resume to normal operation until the FAULT pin voltage rises above VIH(FAULT).

Based on this feature, the TPS92620-Q1 device is able to construct a FAULT bus by tying FAULT pins from multiple TPS92620-Q1 devices to achieve one-fails-all-fail function as Figure 6-6 showing. The lower side TPS92620-Q1 (B) detects any kind of LED fault and pulls low the FAULT pin. The low voltage on FAULT pin is detected by upper side TPS92620-Q1 (A) because the FAULT pins are connected of two devices. The upper side TPS92620-Q1 (A) turns off all output current for each channel as a result. If the FAULT pins of each TPS92620-Q1 are all connected to drive the base of an external PNP transistor as illustrated in Figure 6-7, the one-fails–all-fail function is disabled and only the faulty channel device is turned off.

GUID-20220621-SS0I-ZV1C-RDBT-TB7FH1LW4JR2-low.svgFigure 6-6 FAULT Bus for One-Fails-All-Fail Application
GUID-20220621-SS0I-B8Z8-SVQW-0QTDBGZVQNQ6-low.svgFigure 6-7 FAULT Bus for One-Fails-Others-On Application